Datasheet > 74HC2G02DP-Q100

74HC2G02DP-Q100

更新时间： 2024-02-21 21:00:00

品牌	Logo	应用领域
安世 - NEXPERIA		光电二极管逻辑集成电路
页数	文件大小	规格书
12页	210K
描述
Dual 2-input NOR gate

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中文翻译

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技术参数
数据手册

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74HC2G02DP-Q100 技术参数

生命周期：	Transferred	零件包装代码：	TSSOP
包装说明：	3 MM, PLASTIC, SOT505-2, TSSOP-8	针数：	8
Reach Compliance Code：	unknown	风险等级：	5.78
Base Number Matches：	1

74HC2G02DP-Q100 数据手册

74HC2G02-Q100;

74HCT2G02-Q100

Dual 2-input NOR gate

Rev. 2 — 26 July 2018

Product data sheet

1. General description

The 74HC2G02-Q100; 74HCT2G02-Q100 is a dual 2-input NOR gate. Inputs include clamp

diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of

V_CC

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

•

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

•

Wide supply voltage range from 2.0 V to 6.0 V

Input levels:

•

For 74HC2G02-Q100: CMOS level

For 74HCT2G02-Q100: TTL level

•

Symmetrical output impedance

High noise immunity

Complies with JEDEC standard no. 7A (4.5 V to 5.5 V)

Low power dissipation

Balanced propagation delays

Multiple package options

ESD protection:

•

MIL-STD-883, method 3015 exceeds 2000 V

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

Description

Version

74HC2G02DP-Q100

74HCT2G02DP-Q100

74HC2G02DC-Q100

74HCT2G02DC-Q100

-40 °C to +125 °C

TSSOP8

plastic thin shrink small outline package;

8 leads; body width 3 mm; lead length 0.5 mm

SOT505-2

-40 °C to +125 °C

VSSOP8

plastic very thin shrink small outline package;

8 leads; body width 2.3 mm

SOT765-1

12 3 4 5 6 7...12

中文翻译

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