Datasheet > 74AHC1G79GW125

74AHC1G79GW125

更新时间： 2022-03-04 00:04:13

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
12页	76K
描述
Single D-type flip-flop; positive-edge trigger

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数据手册

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74AHC1G79GW125 数据手册

74AHC1G79; 74AHCT1G79

Single D-type ﬂip-ﬂop; positive-edge trigger

Rev. 05 — 2 July 2007

Product data sheet

1. General description

74AHC1G79 and 74AHCT1G79 are high-speed Si-gate CMOS devices. They provide a

single positive-edge triggered D-type ﬂip-ﬂop.

Information on the data input is transferred to the Q output on the LOW-to-HIGH transition

of the clock pulse. The D input must be stable one set-up time prior to the LOW-to-HIGH

clock transition for predictable operation.

The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.

The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.

2. Features

I Symmetrical output impedance

I High noise immunity

I Low power dissipation

I Balanced propagation delays

I SOT353-1 and SOT753 package options

I ESD protection:

N HBM JESD22-A114E: exceeds 2000 V

N MM JESD22-A115-A: exceeds 200 V

N CDM JESD22-C101C: exceeds 1000 V

I Speciﬁed from −40 °C to +125 °C

3. Ordering information

Table 1.

Ordering information

Type number

Package

Temperature range Name

Description

Version

74AHC1G79GW −40 °C to +125 °C

TSSOP5

plastic thin shrink small outline package; 5 leads;

body width 1.25 mm

SOT353-1

74AHCT1G79GW

74AHC1G79GV

74AHCT1G79GV

−40 °C to +125 °C

SC-74A

plastic surface-mounted package; 5 leads

SOT753

12 3 4 5 6 7...12

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