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74ACQ543QSCQR PDF预览

74ACQ543QSCQR

更新时间: 2024-01-26 08:44:44
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
12页 214K
描述
AC SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, QSOP-24

74ACQ543QSCQR 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SSOP,针数:24
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.72系列:AC
JESD-30 代码:R-PDSO-G24长度:8.65 mm
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER位数:8
功能数量:1端口数量:2
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH传播延迟(tpd):8.5 ns
认证状态:Not Qualified座面最大高度:1.75 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL宽度:3.9116 mm
Base Number Matches:1

74ACQ543QSCQR 数据手册

 浏览型号74ACQ543QSCQR的Datasheet PDF文件第2页浏览型号74ACQ543QSCQR的Datasheet PDF文件第3页浏览型号74ACQ543QSCQR的Datasheet PDF文件第4页浏览型号74ACQ543QSCQR的Datasheet PDF文件第5页浏览型号74ACQ543QSCQR的Datasheet PDF文件第6页浏览型号74ACQ543QSCQR的Datasheet PDF文件第7页 
March 1993  
74ACQ543 54ACTQ/74ACTQ543  
#
Quiet Series Octal Registered Transceiver with  
TRI-STATE Outputs  
É
General Description  
The ACQ/ACTQ543 is a non-inverting octal transceiver  
containing two sets of D-type registers for temporary stor-  
age of data flowing in either direction. Separate Latch En-  
able and Output Enable inputs are provided for each regis-  
ter to permit independent input and output control in either  
direction of data flow.  
Features  
Y
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Y
Y
Y
Y
Y
Y
Y
Y
Guaranteed pin-to-pin skew AC performance  
8-bit octal latched transceiver  
Separate controls for data flow in each direction  
Back-to-back registers for storage  
Outputs source/sink 24 mA  
The ACQ/ACTQ utilizes NSC Quiet Series technology to  
guarantee quiet output switching and improved dynamic  
threshold performance. FACT Quiet SeriesTM features  
GTOTM output control and undershoot corrector in addition  
to a split ground bus for superior performance.  
4 kV minimum ESD immunity  
300 mil slim PDIP/SOIC  
Standard Military Drawing (SMD)  
Ð 54ACTQ543: 5962-9219201  
Logic Symbols  
Connection Diagrams  
Pin Assignment for  
DIP, SOIC, QSOP and Flatpak  
Pin Assignment  
for LCC  
TL/F/10154–1  
TL/F/10154–3  
IEEE/IEC  
TL/F/10154–2  
TL/F/10154–4  
FASTÉ and TRI-STATEÉ are registered trademarks of National Semiconductor Corporation.  
FACTTM, FACT Quiet SeriesTM and GTOTM are trademarks of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/10154  
RRD-B30M75/Printed in U. S. A.  

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