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73S8024RN-IMR/F PDF预览

73S8024RN-IMR/F

更新时间: 2024-01-15 09:56:59
品牌 Logo 应用领域
美信 - MAXIM /
页数 文件大小 规格书
27页 459K
描述
Low-Cost Smart Card Interface

73S8024RN-IMR/F 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete包装说明:QFN-32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.57
模拟集成电路 - 其他类型:ANALOG CIRCUITJESD-30 代码:S-XQCC-N32
长度:4 mm湿度敏感等级:1
功能数量:1端子数量:32
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED座面最大高度:0.85 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2.7 V
表面贴装:YES温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4 mmBase Number Matches:1

73S8024RN-IMR/F 数据手册

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73S8024RN Data Sheet  
DS_8024RN_020  
MICROCONTROLLER INTERFACE  
Name  
Pin  
Pin  
Pin  
Description  
28SO  
20QFN 32QFN  
19  
10  
20  
18  
Command VCC (negative assertion): Logic low on this pin  
causes the LDO regulator to ramp the VCC supply to the  
card and initiates a card activation sequence, if a card is  
present.  
CMDVCC  
3
31  
5 volt / 3 volt card selection: Logic one selects 5 volts for  
VCC and card interface, logic low selects 3 volt operation.  
When the part is to be used with a single card voltage,  
this pin should be tied to either GND or VDD. However, it  
includes a high impedance pull-up resistor to default this  
pin high (selection of 5V card) when not connected.  
5V/#V  
CLKSTOP  
CLKLVL  
7
8
4
5
Stops the card clock signal during a card session when  
set high (card clock STOP mode). Internal pull-down  
resistor allows this pin to be left as an open circuit if the  
clock STOP mode is not used.  
Sets the logic level of the card clock STOP mode when  
the clock is de-activated by setting pin 7 high. Logic low  
selects card STOP low. Logic high selects card STOP  
high. Internal pull-down resistor allows this pin to be left  
as an open circuit if the clock STOP mode is not used.  
CLKDIV1  
CLKDIV2  
1
2
18  
19  
29  
30  
Sets the divide ratio from the XTAL oscillator (or external  
clock input) to the card clock. These pins include  
pull-down resistors.  
CLKDIV1  
CLKDIV2  
CLOCK RATE  
XTALIN/8  
XTALIN/4  
XTALIN/2  
XTALIN  
0
0
1
1
0
1
1
0
23  
14  
22  
Interrupt signal to the processor. Active Low - Multi-  
function indicating fault conditions and card presence.  
Open drain output configuration. It includes an internal  
21kΩ pull-up to VDD.  
OFF  
RSTIN  
I/OUC  
20  
26  
11  
17  
19  
26  
Reset Input: This signal is the reset command to the card.  
System controller data I/O to/from the card. Includes a  
pull-up resistor to VDD.  
AUX1UC  
AUX2UC  
27  
28  
27  
28  
System controller auxiliary data I/O to/from the card.  
Includes a pull-up resistor to VDD.  
System controller auxiliary data I/O to/from the card.  
Includes a pull-up resistor to VDD.  
6
Rev. 2  

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