Datasheet > 72271LA10TFG8

72271LA10TFG8

更新时间： 2024-01-09 06:52:26

品牌	Logo	应用领域
艾迪悌 - IDT		先进先出芯片
页数	文件大小	规格书
27页	446K
描述
CMOS SuperSync FIFO

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72271LA10TFG8 技术参数

是否Rohs认证：	符合	生命周期：	Active
包装说明：	LFQFP,	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.32.00.71
风险等级：	5.24	Is Samacsys：	N
最长访问时间：	8 ns	其他特性：	RETRANSMIT; AUTO POWER DOWN; EASY EXPANDABLE IN DEPTH AND WIDTH
周期时间：	10 ns	JESD-30 代码：	S-PQFP-G64
长度：	10 mm	内存密度：	294912 bit
内存宽度：	9	功能数量：	1
端子数量：	64	字数：	32768 words
字数代码：	32000	工作模式：	SYNCHRONOUS
最高工作温度：	70 °C	最低工作温度：
组织：	32KX9	可输出：	YES
封装主体材料：	PLASTIC/EPOXY	封装代码：	LFQFP
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE, FINE PITCH
并行/串行：	PARALLEL	峰值回流温度（摄氏度）：	260
座面最大高度：	1.6 mm	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	30	宽度：	10 mm
Base Number Matches：	1

72271LA10TFG8 数据手册

CMOS SuperSync FIFO^™

16,384 x 9

32,768 x 9

IDT72261LA

IDT72271LA

• Available in the 64-pin Thin Quad Flat Pack (TQFP) and the 64-

pin Slim Thin Quad Flat Pack (STQFP)

• High-performance submicron CMOS technology

• Industrial temperature range (–40°C to +85°C) is available

• Green parts available, see ordering information

FEATURES:

• Choose among the following memory organizations:

IDT72261LA 16,384 x 9

IDT72271LA 32,768 x 9

• Pin-compatible with the IDT72281/72291 SuperSync FIFOs

• 10ns read/write cycle time (8ns access time)

• Fixed, low first word data latency time

• Auto power down minimizes standby power consumption

• Master Reset clears entire FIFO

• Partial Reset clears data, but retains programmable settings

• Retransmit operation with fixed, low first word data latency time

• Empty, Full and Half-Full flags signal FIFO status

• Programmable Almost-Empty and Almost-Full flags, each flag

can default to one of two preselected offsets

• Program partial flags by either serial or parallel means

• Select IDT Standard timing (using EF and FF flags) or First

Word Fall Through timing (using OR and IR flags)

• Output enable puts data outputs into high impedance state

• Easily expandable in depth and width

DESCRIPTION:

The IDT72261LA/72271LA are exceptionally deep, high speed, CMOS

First-In-First-Out (FIFO) memories with clocked read and write controls.

These FIFOs offer numerous improvements over previous SuperSync

FIFOs, including the following:

• Thelimitationofthefrequencyofoneclockinputwithrespecttotheother

has been removed. The Frequency Select pin (FS) has been removed,

thus it is no longer necessary to select which of the two clock inputs,

RCLK or WCLK, is running at the higher frequency.

• The period required by the retransmit operation is now fixed and short.

• The first word data latency period, from the time the first word is written

to an empty FIFO to the time it can be read, is now fixed and short. (The

variableclockcyclecountingdelayassociatedwiththelatencyperiodfound

on previous SuperSync devices has been eliminated on this SuperSync

family.)

• Independent Read and Write clocks (permit reading and writing

simultaneously)

FUNCTIONAL BLOCK DIAGRAM

D0 -D8

WEN

WCLK

SEN

OFFSET REGISTER

INPUT REGISTER

FF/IR

PAF

EF/OR

PAE

FLAG

LOGIC

WRITE CONTROL

LOGIC

FWFT/SI

RAM ARRAY

16,384 x 9

32,768 x 9

WRITE POINTER

READ POINTER

READ

CONTROL

LOGIC

OUTPUT REGISTER

MRS

PRS

RESET

LOGIC

RCLK

REN

Q0 -Q8

4671 drw 01

IDT,IDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc.TheSuperSyncFIFOisatrademarkofIntegratedDeviceTechnology,Inc.

JULY 2013

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

DSC-4671/5

12 3 4 5 6 7...27

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与72271LA10TFG8相关器件

型号	品牌	描述	获取价格	数据表
72271LA10TFGI	IDT	CMOS SuperSync FIFO	获取价格
72271LA10TFGI8	IDT	CMOS SuperSync FIFO	获取价格
72271LA15PFG	IDT	FIFO, 32KX9, 10ns, Synchronous, CMOS, PQFP64, GREEN, PLASTIC, TQFP-64	获取价格
72271LA15PFG8	IDT	CMOS SuperSync FIFO	获取价格
72271LA15PFGI	IDT	FIFO, 32KX9, 10ns, Synchronous, CMOS, PQFP64, GREEN, PLASTIC, TQFP-64	获取价格
72271LA15PFGI8	IDT	CMOS SuperSync FIFO	获取价格

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