FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
Table 46: TMUX[4:0] Selections .................................................................................................................52
Table 47: Available Circuit Functions..........................................................................................................56
Table 48: I/O RAM Map in Functional Order...............................................................................................70
Table 49: I/O RAM Description - Alphabetical ............................................................................................75
Table 50: CE EQU Equations and Element Input Mapping ........................................................................87
Table 51: CESTATUS Bit Definitions............................................................................................................87
Table 52: CECONFIG Bit Definitions...........................................................................................................88
Table 53: Sag Threshold Control................................................................................................................89
Table 54: Gain Adjust Control.....................................................................................................................89
Table 55: CE Transfer Variables.................................................................................................................90
Table 56: CE Energy Measurement Variables............................................................................................90
Table 57: Useful CE Measurement Parameters .........................................................................................91
Table 58: CE Pulse Generation Parameters...............................................................................................92
Table 59: CE Calibration Parameters .........................................................................................................92
Table 60: CE Parameters for Noise Suppression and Code Version.........................................................93
Table 61: Absolute Maximum Ratings ........................................................................................................95
Table 62: Recommended External Components........................................................................................96
Table 63: Recommended Operating Conditions.........................................................................................96
Table 64: Input Logic Levels.......................................................................................................................97
Table 65: Output Logic Levels ....................................................................................................................97
Table 66: Power-Fault Comparator Performance Specifications...............................................................97
Table 67: Battery Monitor Performance Specifications (BME= 1)...............................................................97
Table 68: Supply Current Performance Specifications...............................................................................98
Table 69: V3P3D Switch Performance Specifications................................................................................98
Table 70: 2.5 V Voltage Regulator Performance Specifications.................................................................98
Table 71: Low-Power Voltage Regulator Performance Specifications.......................................................98
Table 72: Crystal Oscillator Performance Specifications............................................................................99
Table 73: LCD DAC Performance Specifications .......................................................................................99
Table 74: LCD Driver Performance Specifications .....................................................................................99
Table 75: Optical Interface Performance Specifications.............................................................................99
Table 76: Temperature Sensor Performance Specifications....................................................................100
Table 77: VREF Performance Specifications............................................................................................100
Table 78: ADC Converter Performance Specifications.............................................................................101
Table 79: Flash Memory Timing Specifications........................................................................................102
Table 80: EEPROM Interface Timing........................................................................................................102
Table 81: RESET Timing ..........................................................................................................................102
Table 82: SPI Slave Port (MISSION Mode) Timing..................................................................................103
Table 83: Recommended PCB Land Pattern Dimensions........................................................................107
Table 84: Power and Ground Pins............................................................................................................110
Table 85: Analog Pins...............................................................................................................................110
Table 86: Digital Pins ................................................................................................................................111
v1.2
© 2005-2009 TERIDIAN Semiconductor Corporation
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