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7007L25GI8 PDF预览

7007L25GI8

更新时间: 2023-02-26 15:16:54
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器
页数 文件大小 规格书
21页 164K
描述
Multi-Port SRAM, 32KX8, 25ns, CMOS, CPGA68

7007L25GI8 数据手册

 浏览型号7007L25GI8的Datasheet PDF文件第3页浏览型号7007L25GI8的Datasheet PDF文件第4页浏览型号7007L25GI8的Datasheet PDF文件第5页浏览型号7007L25GI8的Datasheet PDF文件第7页浏览型号7007L25GI8的Datasheet PDF文件第8页浏览型号7007L25GI8的Datasheet PDF文件第9页 
IDT7007S/L  
High-Speed 32K x 8 Dual-Port Static RAM  
Military, Industrial and Commercial Temperature Ranges  
DC Electrical Characteristics Over the Operating  
Temperature and Supply Voltage Range (VCC = 5.0V ± 10%)  
7007S  
7007L  
Symbol  
|ILI  
|ILO  
Parameter  
Test Conditions  
Min.  
Max.  
10  
Min.  
Max.  
5
Unit  
µA  
µA  
V
(1)  
___  
___  
|
Input Leakage Current  
Output Leakage Current  
Output Low Voltage  
V
CC = 5.5V, VIN = 0V to VCC  
___  
___  
___  
___  
|
10  
5
CE = VIH, VOUT = 0V to VCC  
VOL  
I
OL = 4mA  
0.4  
0.4  
___  
___  
VOH  
Output High Voltage  
IOH = -4mA  
2.4  
2.4  
V
2940 tbl 08  
NOTE:  
1. At Vcc < 2.0V, input leakages are undefined.  
DC Electrical Characteristics Over the Operating  
Temperature and Supply Voltage Range(1) (VCC = 5.0V ± 10%)  
7007X15  
7007X20  
Com'l & Ind  
7007X25  
Com'l, Ind  
& Military  
Com'l Only  
Symbol  
Parameter  
Test Condition  
Version  
COM'L  
Typ.(2)  
Max.  
Typ.(2)  
Max.  
Typ.(2)  
Max.  
Unit  
ICC  
Dynamic Operating  
Current  
(Both Ports Active)  
S
L
190  
190  
325  
285  
180  
180  
315  
275  
170  
170  
305  
265  
mA  
CE = VIL, Outputs Disabled  
SEM = VIH  
(3)  
f = fMAX  
___  
___  
___  
___  
___  
___  
MIL &  
IND  
S
L
170  
170  
345  
305  
180  
315  
I
SB1  
Standby Current  
(Both Ports - TTL Level  
Inputs)  
COM'L  
S
L
35  
35  
85  
60  
30  
30  
85  
60  
25  
25  
85  
60  
mA  
mA  
CE  
SEM  
f = fMAX  
L
= CE  
R
= VIH  
= VIH  
R
= SEM  
L
(3)  
___  
___  
___  
___  
___  
___  
MIL &  
IND  
S
L
25  
25  
100  
80  
30  
80  
(5)  
ISB2  
Standby Current  
(One Port - TTL Level  
Inputs)  
COM'L  
S
L
125  
125  
220  
190  
115  
115  
210  
180  
105  
105  
200  
170  
CE"A" = VIL and CE"B" = VIH  
Active Port Outputs Disabled,  
(3)  
f=fMAX  
___  
___  
___  
___  
___  
___  
MIL &  
IND  
S
L
105  
105  
230  
200  
SEMR = SEML = VIH  
115  
210  
I
SB3  
Full Standby Current  
(Both Ports - All CMOS  
Level Inputs)  
Both Ports CE  
CE > VCC - 0.2V  
IN > VCC - 0.2V or  
VIN < 0.2V, f = 0(4)  
SEM = SEM > VCC - 0.2V  
L
and  
COM'L  
S
L
1.0  
0.2  
15  
5
1.0  
0.2  
15  
5
1.0  
0.2  
15  
5
mA  
mA  
R
V
___  
___  
___  
___  
___  
___  
MIL &  
IND  
S
L
1.0  
0.2  
30  
10  
0.2  
10  
R
L
ISB4  
Full Standby Current  
(One Port - All CMOS  
Level Inputs)  
COM'L  
S
L
120  
120  
190  
160  
110  
110  
185  
160  
100  
100  
175  
160  
CE"A" < 0.2V and  
(5)  
CE"B" > VCC - 0.2V  
SEM = SEM > VCC - 0.2V  
IN > VCC - 0.2V or VIN < 0.2V  
R
L
___  
___  
___  
___  
___  
___  
MIL &  
IND  
S
L
100  
100  
200  
175  
V
110  
185  
Active Port Outputs Disabled  
(3)  
f = fMAX  
2940 tbl 09  
NOTES:  
1. 'X' in part numbers indicates power rating (S or L)  
2. VCC = 5V, TA = +25°C, and are not production tested. ICCDC = 120mA (Typ.)  
3. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC, and using AC Test Conditions” of input  
levels of GND to 3V.  
4. f = 0 means no address or control lines change.  
5. Port "A" may be either left or right port. Port "B" is the opposite from port "A".  
6

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