Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION
TABLE OF CONTENTS
Title
Section
Page
SECTION 4
INTERRUPTS
4.1
4.2
4.3
4.4
4.5
Hardware Controlled Interrupt Sequence ........................................................4-2
Timer Interrupt .................................................................................................4-3
External Interrupt .............................................................................................4-4
Optional External Interrupts (PA0-PA7) ...........................................................4-6
Software Interrupt (SWI) .................................................................................4-6
SECTION 5
RESETS
5.1
5.2
5.3
Power-On Reset (POR) ..................................................................................5-1
RESET Pin ......................................................................................................5-1
Computer Operating Properly (COP) Reset ....................................................5-1
SECTION 6
LOW POWER MODES
6.1
6.2
6.3
6.2
STOP Instruction..............................................................................................6-1
Stop Mode .......................................................................................................6-1
Halt Mode.........................................................................................................6-2
WAIT Instruction...............................................................................................6-2
SECTION 7
SIMPLE SERIAL INPUT/OUTPUT PORT
7.1
7.1.1
7.1.2
Signal Format ..................................................................................................7-1
Serial Clock (SCK) ......................................................................................7-1
Serial Data Out (SDO) ................................................................................7-2
iv
Rev. 2.0
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