Model 654P/L
Advanced PLL LVPECL or LVDS Clock
Mechanical Specifications
Package Drawing
Marking Information
1. ** - Manufacturing Site Code.
2. D – Date Code. See Table I for codes.
3. O – Output Type; P = LVPECL, L = LVDS.
3. ST – Frequency Stability/Temperature Code.
[Refer to Ordering Information]
4. V – Voltage Code; 3 = 3.3V, 2 = 2.5V.
5. xxxx – Frequency Code.
CTS**D
654OSTV
● xxxx
3-digits, frequencies below 100MHz
4-digits, frequencies 100MHz or greater
[See document 016-1454-0, Frequency Code Tables.]
Recommended Pad Layout
Notes
1. JEDEC termination code (e4). Barrier-plating is
nickel [Ni] with gold [Au] flash plate.
2. Reflow conditions per JEDEC J-STD-020; +260°C
maximum, 20 seconds.
3. MSL = 1.
Pin Assignments
Pin
Symbol
EOH or N.C.
N.C. or EOH
GND
Function
1
Enable [std] or No Connect
No Connect or Enable [opt]
Circuit & Package Ground
RF Output
2
3
4
Output
5
Output
Complimentary RF Output
Supply Voltage
6
VCC
Table I - Date Code
MONTH
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
NOV
DEC
YEAR
2001 2005 2009 2013 2017
2002 2006 2010 2014 2018
2003 2007 2011 2015 2019
2004 2008 2012 2016 2020
A
N
a
B
P
b
p
C
Q
c
D
R
d
r
E
S
e
s
F
T
f
G
U
g
H
V
h
v
J
W
j
K
X
k
x
L
Y
l
M
Z
m
z
n
q
t
u
w
y
DOC# 008-0549-0 Rev. C
Page 6 of 8
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.