HS-1120RH
Driving Capacitive Loads
Application Information
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
Optimum Feedback Resistor
The enclosed plots of inverting and non-inverting frequency
response illustrate the performance of the HS-1120RH in
various gains. Although the bandwidth dependency on
closed loop gain isn’t as severe as that of a voltage feedback
amplifier, there can be an appreciable decrease in
avoided by placing a resistor (R ) in series with the output
S
prior to the capacitance.
bandwidth at higher gains. This decrease may be minimized Figure 1 details starting points for the selection of this resis-
by taking advantage of the current feedback amplifier’s tor. The points on the curve indicate the R and C combina-
S
L
unique relationship between bandwidth and R . All current tions for the optimum bandwidth, stability, and settling time,
F
feedback amplifiers require a feedback resistor, even for but experimental fine tuning is recommended. Picking a
unity gain applications, and R , in conjunction with the point above or to the right of the curve yields an overdamped
F
internal compensation capacitor, sets the dominant pole of response, while points below or left of the curve indicate
the frequency response. Thus, the amplifier’s bandwidth is areas of underdamped performance.
inversely proportional to R . The HS-1120RH design is
F
R
and C form a low pass network at the output, thus
L
S
optimized for a 510Ω R at a gain of +1. Decreasing R in a
F
F
limiting system bandwidth well below the amplifier band-
width of 850MHz. By decreasing R as C increases (as
illustrated in the curves), the maximum bandwidth is
obtained without sacrificing stability. Even so, bandwidth
does decrease as you move to the right along the curve.
For example, at A = +1, R = 50Ω, C = 30pF, the overall
unity gain application decreases stability, resulting in
excessive peaking and overshoot. At higher gains the
amplifier is more stable, so R can be decreased in a trade-
F
off of stability for bandwidth.
S
L
The table below lists recommended R values for various
F
gains, and the expected bandwidth.
V
S
L
bandwidth is limited to 300MHz, and bandwidth drops to
100MHz at A = +1, R = 5Ω, C = 340pF.
V
S
L
GAIN
(A
BANDWIDTH
(MHz)
)
R (Ω)
F
CL
50
45
40
35
30
25
20
15
10
5
-1
+1
430
510
360
150
180
270
580
850
670
520
240
125
A
= +1
V
+2
+5
+10
+19
A
= +2
40
PC Board Layout
V
0
0
80
120 160 200 240 280 320 360 400
LOAD CAPACITANCE (pF)
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The
use of low inductance components such as chip resis-
tors and chip capacitors is strongly recommended,
while a solid ground plane is a must!
FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs
LOAD CAPACITANCE
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.
Evaluation Board
The performance of the HS-1120RH may be evaluated using
the HFA11XXEVAL Evaluation Board.
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
output must be minimized, or isolated as discussed in the
next section.
The layout and schematic of the board are shown in
Figure 2. To order evaluation boards, please contact your
local sales office.
Care must also be taken to minimize the capacitance to
ground seen by the amplifier’s inverting input (-IN). The
larger this capacitance, the worse the gain peaking, resulting
in pulse overshoot and possible instability. To this end, it is
recommended that the ground plane be removed under
traces connected to -IN, and connections to -IN should be
kept as short as possible.
Offset Adjustment
The output offset voltage of the HS-1120RH may be nulled via
connections to the BAL pins. Unlike a voltage feedback
amplifier, offset adjustment is accomplished by varying the sign
and/or magnitude of the inverting input bias current (-I
).
BIAS
With voltage feedback amplifiers, bias currents are matched
and bias current induced offset errors are nulled by matching
the impedances seen at the positive and negative inputs. Bias
An example of a good high frequency layout is the Evalua-
tion Board shown in Figure 2.
2
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