TLC5618, TLC5618A
PROGRAMMABLE DUAL 12-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS156G – JULY 1997 – REVISED APRIL 2001
electrical characteristics over recommended operating free-air temperature range, V = 5 V ± 5%,
DD
V
= 2.048 V (unless otherwise noted)
ref(REFIN)
static DAC specifications
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
UNIT
bits
Resolution
12
Integral nonlinearity (INL), end point adjusted
V
= 2.048 V,
= 2.048 V,
= 2.048 V,
= 2.048 V,
See Note 1
±4
± 1
LSB
ref(REFIN)
Differential nonlinearity (DNL)
V
See Note 2
±0.5
LSB
ref(REFIN)
E
E
Zero-scale error (offset error at zero scale)
Zero-scale-error temperature coefficient
V
See Note 3
±12
mV
ZS
ref(REFIN)
V
See Note 4
3
ppm/°C
ref(REFIN)
C and I suffixes
Q and M suffixes
See Note 6
±0.29
±0.60
V
= 2.048 V,
% of FS
voltage
ref(REFIN)
See Note 5
Gain error
G
Gain error temperature coefficient
V
= 2.048 V,
1
ppm/°C
ref(REFIN)
Zero scale
65
Slow
Fast
Gain
65
65
65
PSRR Power-supply rejection ratio
See Notes 7 and 8
dB
Zero scale
Gain
NOTES: 1. The relative accuracy or integral nonlinearity (INL) sometimes referred to as linearity error, is the maximum deviation of the output
from the line between zero and full scale excluding the effects of zero code and full-scale errors.
2. The differential nonlinearity (DNL) sometimes referred to as differential error, is the difference between the measured and ideal
1 LSB amplitude change of any two adjacent codes. Monotonic means the output voltage changes in the same direction (or remains
constant) as a change in the digital input code.
3. Zero-scale error is the deviation from zero voltage output when the digital input code is zero.
6
4. Zero-scale-error temperature coefficient is given by: E
ZS
TC = [E
(T
) – E
(T
)]/V × 10 /(T
– T
).
min
ZS max
ZS min
ref max
5. Gain error is the deviation from the ideal output (V – 1 LSB) with an output load of 10 kΩ excluding the effects of the zero-error.
ref
6
6. Gain temperature coefficient is given by: E TC = [E (T
) – E (T
)]/V × 10 /(T
from 4.5 V to 5.5 V dc and measuring the proportion of
– T
).
min
G
G
max
G
min ref max
7. Zero-scale-error rejection ratio (EZS-RR) is measured by varying the V
this signal imposed on the zero-code output voltage.
DD
8. Gain-errorrejection ratio (EG-RR) is measured by varying the V
from 4.5 V to 5.5 V dc and measuring the proportion of this signal
imposed on the full-scale output voltage after subtracting the zero scale change.
DD
OUT A and OUT B output specifications
PARAMETER
Voltage output range
TEST CONDITIONS
= 10 kΩ
MIN
TYP
MAX
–0.4
UNIT
V
O
R
0
V
V
L
DD
±0.29
% of FS
voltage
Output load regulation accuracy
V
= 4.096 V,
R = 2 kΩ
L
O(OUT)
V
V
= V
= V
,
,
Fast
Slow
Fast
Slow
38
23
O(A OUT)
O(B OUT)
DD
DD
I
Output short circuit sink current
mA
mA
OSC(sink)
Input code zero
V
V
= 0 V,
= 0 V,
–54
–29
O(A OUT)
O(B OUT)
I
Output short circuit source current
OSC(source)
Full-scale code
I
I
Output sink current
V
V
= 0.25 V
= 4.2 V
5
5
mA
mA
O(sink)
O(OUT)
Output source current
O(source)
O(OUT)
5
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