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5962-9326102M2A PDF预览

5962-9326102M2A

更新时间: 2024-02-27 10:03:10
品牌 Logo 应用领域
德州仪器 - TI 稳压器开关式稳压器或控制器电源电路开关式控制器
页数 文件大小 规格书
18页 741K
描述
ADVANCED HIGH-POWER FACTOR PREREGULATOR

5962-9326102M2A 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QLCC
包装说明:CERAMIC, LCC-20针数:20
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.79
Is Samacsys:N模拟集成电路 - 其他类型:POWER FACTOR CONTROLLER
控制模式:CURRENT-MODE控制技术:PULSE WIDTH MODULATION
最大输入电压:20 V最小输入电压:10 V
标称输入电压:18 VJESD-30 代码:S-CQCC-N20
长度:8.89 mm功能数量:1
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C最大输出电流:1.5 A
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:QCCN
封装等效代码:LCC20,.35SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified筛选级别:MIL-STD-883
座面最大高度:2.03 mm子类别:Switching Regulator or Controllers
表面贴装:YES切换器配置:BOOST
最大切换频率:120 kHz技术:BIPOLAR
温度等级:MILITARY端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:8.89 mm
Base Number Matches:1

5962-9326102M2A 数据手册

 浏览型号5962-9326102M2A的Datasheet PDF文件第4页浏览型号5962-9326102M2A的Datasheet PDF文件第5页浏览型号5962-9326102M2A的Datasheet PDF文件第6页浏览型号5962-9326102M2A的Datasheet PDF文件第8页浏览型号5962-9326102M2A的Datasheet PDF文件第9页浏览型号5962-9326102M2A的Datasheet PDF文件第10页 
UC1854A  
UC2854A, UC2854B  
UC3854A, UC3854B  
www.ti.com  
SLUS329EMONTH 2003REVISED JANUARY 2008  
TERMINAL FUNCTIONS  
TERMINAL  
PACKAGES  
I/O  
DESCRIPTION  
NAME  
J/N/DW  
Q/L  
Output of the wide bandwidth current amplifier and one of the inputs to the PWM duty-cycle  
comparator. The output signal generated by this amplifier commands the PWM to force the correct  
input current. The output can swing from 0.1 V to 7.5 V.  
CAO  
3
4
O
CT  
14  
10  
18  
13  
I
I
Capacitor from CT to GND sets the PWM oscillator frequency.  
A nominal voltage above 2.65 V on this pin allows the device to begin operating. Once operating,  
the device shuts off if this pin goes below 2.15 V nominal.  
ENA  
All bypass and timing capacitors connected to GND should have leads as short and direct as  
possible. All voltages are measured with respect GND.  
GND  
1
2
Output of the PWM is a 1.5-A peak totem-pole MOSFET gate driver on GTDRV. Use a series gate  
resistor of at least 5 to prevent interaction between the gate impedance and the GTDRV output  
driver that might cause the GTDRV output to overshoot excessively. Some overshoot of the  
GTDRV output is always expected when driving a capacitive load.  
GTDRV  
16  
20  
O
Current input to the multiplier, proportional to the instantaneous line voltage. This input to the  
analog multiplier is a current. The multiplier is tailored for very low distortion from this current input  
(IAC) to MOUT, so this is the only multiplier input that should be used for sensing instantaneous  
line voltage.  
IAC  
6
4
8
5
I
I
Switch current sensing input. This is the inverting input to the current amplifier. This input and the  
non-inverting input MOUT remain functional down to and below GND. Care should be taken to  
avoid taking these inputs below –0.5 V, because they are protected with diodes to GND.  
ISENSE  
Multiplier output and current sense plus. The output of the analog multiplier and the non-inverting  
input of the current amplifier are connected together at MOUT. The cautions about taking ISENSE  
below –0.5 V also apply to MOUT. As the multiplier output is a current, this is a high-impedance  
input similar to ISENSE, so the current amplifier can be configured as a differential amplifier to reject  
GND noise. IMOUT 2 × IAC  
MOUT  
5
7
I/O  
Peak limit. The threshold for PKLMT is 0.0 V. Connect this input to the negative voltage on the  
current sense resistor. Use a resistor to REF to offset the negative current sense signal up to GND.  
PKLMT  
RSET  
2
3
I
I
Oscillator charging current and multiplier limit set. A resistor from RSET to ground programs  
oscillator charging current.  
12  
15  
Soft-start. SS remains at GND as long as the device is disabled or VCC is too low. SS pulls up to  
over 3 V by an internal 14-µA current source when both VCC becomes valid and the device is  
enabled. SS acts as the reference input to the voltage amplifier if SS is below VREF. With a large  
capacitor from SS to GND, the reference to the voltage regulating amplifier rises slowly, and  
increase the PWM duty cycle slowly. In the event of a disable command or a supply dropout, SS  
will quickly discharge to ground and disable the PWM.  
SS  
13  
17  
I
VAO  
VCC  
7
9
I
I
Voltage amplifier output  
Positive supply rail  
15  
19  
Used to set the peak limit point and as an internal reference for various device functions. This  
voltage must be present for the device to operate.  
VREF  
9
8
12  
10  
14  
O
I
One of the inputs into the multiplier. This pin provides the input RMS voltage to the multiplier  
circuitry.  
VRMS  
This pin provides the feedback from the output. This input goes into the voltage error amplifier and  
the output of the error amplifier is another of the inputs into the multiplier circuit.  
VSENSE  
11  
I
Copyright © 2003–2008, Texas Instruments Incorporated  
Submit Documentation Feedback  
7
Product Folder Link(s): UC1854A UC2854A, UC2854B UC3854A, UC3854B  

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