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5962-9326101MEX PDF预览

5962-9326101MEX

更新时间: 2024-02-03 23:08:17
品牌 Logo 应用领域
德州仪器 - TI 稳压器开关式稳压器或控制器电源电路开关式控制器
页数 文件大小 规格书
12页 312K
描述
1.5A POWER FACTOR CONTROLLER, 200kHz SWITCHING FREQ-MAX, CDIP16

5962-9326101MEX 技术参数

生命周期:ObsoleteReach Compliance Code:unknown
风险等级:5.74Is Samacsys:N
模拟集成电路 - 其他类型:POWER FACTOR CONTROLLER控制模式:CURRENT-MODE
控制技术:PULSE WIDTH MODULATION最大输入电压:35 V
最小输入电压:11 VJESD-30 代码:R-GDIP-T16
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
最大输出电流:1.5 A封装主体材料:CERAMIC, GLASS-SEALED
封装形状:RECTANGULAR封装形式:IN-LINE
认证状态:Not Qualified筛选级别:MIL-STD-883
表面贴装:NO切换器配置:SINGLE
最大切换频率:200 kHz技术:BIPOLAR
温度等级:MILITARY端子形式:THROUGH-HOLE
端子位置:DUALBase Number Matches:1

5962-9326101MEX 数据手册

 浏览型号5962-9326101MEX的Datasheet PDF文件第4页浏览型号5962-9326101MEX的Datasheet PDF文件第5页浏览型号5962-9326101MEX的Datasheet PDF文件第6页浏览型号5962-9326101MEX的Datasheet PDF文件第8页浏览型号5962-9326101MEX的Datasheet PDF文件第9页浏览型号5962-9326101MEX的Datasheet PDF文件第10页 
UC1854  
UC2854  
UC3854  
APPLICATIONS INFORMATION (cont.)  
PROTECTION INPUTS  
ISENSE/Mult Out (Line current): The voltage drop across  
the 0.25 ohm current-sense resistor is applied to pins 4  
and 5 as shown. The current-sense amplifier also oper-  
ates with high low-frequency gain, but unlike the voltage  
amplifier, it is set up to give the current-control loop a very  
wide bandwidth. This enables the line current to follow the  
line voltage as closely as possible. In the present exam-  
ple, this amplifier has a zero at about 500Hz, and a gain  
of about 18dB thereafter.  
ENA (Enable): The ENA input must reach 2.5 volts be-  
fore the REF and GT Drv outputs are enabled. This pro-  
vides a means to shut down the gate in case of trouble, or  
to add a time delay at power up. A hysteresis gap of  
200mV is provided at this terminal to prevent erratic op-  
eration. Undervoltage protection is provided directly at pin  
15, where the on/off thresholds are 16V and 10V. If the  
ENA input is unused, it should be pulled up to VCC  
through a current limiting resistor of 100k.  
VRMS (RMS line voltage): An important feature of the  
UC3854 preregulator is that it can operate with a three-to-  
one range of input line voltages, covering everything from  
low line in the US (85VAC) to high line in Europe  
(255VAC). This is done using line feedforward, which  
keeps the input power constant with varying input voltage  
(assuming constant load power). To do this, the multiplier  
divides the line current by the square of the RMS value of  
the line voltage. The voltage applied to pin 8, proportional  
to the average of the rectified line voltage (and propor-  
tional to the RMS value), is squared in the UC3854, and  
then used as a divisor by the multiplier block. The multi-  
plier output, at pin 5, is a current that increases with the  
current at pin 6 and the voltage at pins 7, and decreases  
with the square of the voltage at pin 8.  
SS (Soft start): The voltage at pin 13 (SS) can reduce  
the reference voltage used by the error amplifier to regu-  
late the output DC voltage. With pin 13 open, the refer-  
ence voltage is typically 7.5V. An internal current source  
delivers approximately -14µA from pin 13. Thus a capaci-  
tor connected between that pin and ground will charge  
linearly from zero to 7.5V in 0.54C seconds, with C ex-  
pressed in microfarads.  
PKLIM (Peak current limit): Use pin 2 to establish the  
highest value of current to be controlled by the power  
MOSFET. With the resistor divider values shown in Figure  
1, the 0.0V threshold at pin 2 is reached when the voltage  
drop across the 0.25 ohm current sense resistor is  
7.5V*2k/10k=1.5V, corresponding to 6A. A bypass capaci-  
tor from pin 2 to ground is recommended to filter out very  
high frequency noise.  
PWM FREQUENCY: The PWM oscillator frequency in  
Figure 1 is 100kHz. This value is determined by CT at pin  
14 and RSET at pin 12. RSET should be chosen first be-  
cause it affects the maximum value of IMULT according to  
the equation:  
CONTROL INPUTS  
VSENSE (Output DC voltage sense): The threshold voltage  
for the VSENSE input is 7.5V and the input bias current is  
typically 50nA. The values shown in Figure 1 are for an  
output voltage of 400V DC. In this circuit, the voltage am-  
plifier operates with a constant low frequency gain for  
minimum output excursions. The 47nF feedback capacitor  
places a 15Hz pole in the voltage loop that prevents  
120Hz ripple from propagating to the input current.  
3.75V  
RSET  
IMULT  
=
MAX  
This effectively sets a maximum PWM-controlled current.  
With RSET=15k,  
3.75V  
15k  
IMULT  
=
= 250µA  
MAX  
IAC (Line waveform): In order to force the line current  
waveshape to follow the line voltage, a sample of the  
power line voltage in waveform is introduced at pin 6. This  
signal is multiplied by the output of the voltage amplifier in  
the internal multiplier to generate a reference signal for  
the current control loop.  
Also note that the multiplier output current will never ex-  
ceed twice IAC.  
With the 4k resistor from Mult Out to the 0.25 ohm current  
sense resistor, the maximum current in the current sense  
resistor will be  
This input is not a voltage, but a current (hence IAC). It is  
set up by the 220k and 910k resistive divider (see Figure  
1). The voltage at pin 6 is internally held at 6V, and the  
two resistors are chosen so that the current flowing into  
pin 6 varies from zero (at each zero crossing) to about  
400µA at the peak of the waveshape. The following for-  
mulas were used to calculate these resistors:  
IMULT  
×4k  
MAX  
IMAX  
=
= 4A  
0.25Ω  
Having thus selected RSET, the current sense resistor,  
and the resistor from Mult Out to the current sense resis-  
tor, calculate CT for the desired PWM oscillator frequency  
from the equation  
Vpk 260VAC × √2  
1.25  
CT =  
RAC  
=
=
= 910k  
IACpk  
400µA  
F × RSET  
RAC  
4
RREF  
=
= 220k  
(where Vpk is the peak line voltage)  
7

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