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5962-9317709VTX PDF预览

5962-9317709VTX

更新时间: 2024-02-24 14:33:19
品牌 Logo 应用领域
爱特美尔 - ATMEL 先进先出芯片
页数 文件大小 规格书
20页 2117K
描述
FIFO, 16KX9, 30ns, Asynchronous, CMOS, CDIP28, 0.300 INCH, SIDE BRAZED, CERAMIC, DIP-28

5962-9317709VTX 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:28
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.13
最长访问时间:30 ns周期时间:40 ns
JESD-30 代码:R-CDIP-T28长度:27.94 mm
内存密度:147456 bit内存宽度:9
功能数量:1端子数量:28
字数:16384 words字数代码:16000
工作模式:ASYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:16KX9
可输出:NO封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:PARALLEL
认证状态:Not Qualified筛选级别:MIL-PRF-38535 Class V
座面最大高度:3.94 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:7.62 mmBase Number Matches:1

5962-9317709VTX 数据手册

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M672061H  
Expansion In (XI)  
Full Flag (FF)  
This input is a dual-purpose pin. Expansion In (XI) is connected to GND to indicate an  
operation in the single device mode. Expansion In (XI) is connected to Expansion Out  
(XO) of the previous device in the Depth Expansion or Daisy Chain modes.  
The Full Flag (FF) will go low, inhibiting further write operations when the write pointer is  
one location less than the read pointer, indicating that the device is full. If the read  
pointer is not moved after Reset (RS), the Full Flag (FF) will go low after 16384 writes.  
Empty Flag (EF)  
The Empty Flag (EF) will go low, inhibiting further read operations when the read pointer  
is equal to the write pointer, indicating that the device is empty.  
Expansion Out/Half-full  
Flag (XO/HF)  
This is a dual-purpose output. In the single device mode, when Expansion In (XI) is con-  
nected to ground, this output acts as an indication of a half-full memory.  
The M672061H offers a variable offset for the Half Full condition. The offset is loaded  
into a register during a reset cycle. When RS is low, the Programmable Half Full Flag  
(PHF) can be loaded from the DATA inputs I0 - I8 by pulsing W low or from the DATA  
outputs Q0 - Q8 by pulsing R low. The offset options are listed in table 1. If PHF is not  
loaded during the reset cycle, the default offset will be the half of the total memory of the  
device.  
The Programmable Half-Full Flag (PHF) will be set to low and will remain set until the  
difference between the write and read pointers is less than or equal to the Programma-  
ble offset (if the Half Full Flag register has been loaded during the reset cycle) or the half  
of the total memory (if the Half Full register has not been loaded during the reset cycle).  
After half the memory is filled and on the falling edge of the next write operation, the  
Half-Full Flag (HF) will be set to low and will remain set until the difference between the  
write and read pointers is less than or equal to half of the total memory of the device.  
The Half-Full Flag (HF) is then reset by the rising edge of the read operation.  
In the Depth Expansion Mode, Expansion In (XI) is connected to Expansion Out (XO) of  
the previous device. This output acts as a signal to the next device in the Daisy Chain by  
providing a pulse to the next device when the previous device reaches the last memory  
location.  
Data Output (Q0 - Q8)  
DATA output for 9-bit wide data. This data is in a high impedance condition whenever  
Read (R) is in a high state.  
5
4144K-AERO-04/07  

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