7024S/L
High-Speed 4K x 16 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Description
port to enter a very low standby power mode.
The IDT7024 is a high-speed 4Kx 16 Dual-Port Static RAM. The
IDT7024isdesignedtobeusedasastand-alone64K-bitDual-PortRAM
orasacombinationMASTER/SLAVEDual-PortRAMfor32-bitormore
wordsystems.UsingtheIDTMASTER/SLAVEDual-PortRAMapproach
in32-bitorwidermemorysystemapplicationsresultsinfull-speed,error-
freeoperationwithouttheneedforadditionaldiscretelogic.
Fabricatedusing CMOShigh-performancetechnology,thesedevices
typicallyoperateononly750mWofpower.Low-power(L)versionsoffer
batterybackupdataretentioncapabilitywithtypicalpowerconsumptionof
500µWfroma2Vbattery.
TheIDT7024ispackagedinaceramic84-pinPGA,an84-pinFlatpack
andPLCC,anda100-pinTQFP.Militarygradeproductismanufactured
incompliancewiththelatestrevisionofMIL-PRF-38535QML,makingit
ideallysuitedtomilitarytemperatureapplicationsdemandingthehighest
levelofperformanceandreliability.
This device provides two independent ports with separate control,
address,andI/Opinsthatpermitindependent,asynchronousaccessfor
reads or writes to any location in memory. An automatic power down
featurecontrolledbychipenable(CE)permitstheon-chipcircuitryofeach
PinConfigurations(1,2,3)
32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12
I/O9R
I/O10R
I/O11R
33
34
35
36
37
38
39
11
I/O7L
I/O6L
I/O5L
I/O4L
I/O3L
I/O2L
GND
I/O1L
I/O0L
10
9
8
7
6
5
I/O12R
I/O13R
I/O14R
GND
I/O15R
40
41
42
43
44
45
46
47
48
49
50
51
52
53
4
3
OER
7024
PLG84
R/WR
2
1
OE
CC
R/W
SEM
L
(4)
GND
SEM
V
R
84
83
82
81
84-Pin PLCC
Top View
L
CER
UBR
LBR
L
CEL
L
UB
N/C
80
79
78
LB
L
A11R
N/C
A10R
A
11L
10L
A
9R
8R
7R
77
76
75
A
A
A
9L
8L
A
A
54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74
2740 drw 02J
74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54
75
A
8L
9L
A
7R
8R
9R
10R
11R
N/C
LB
53
52
51
50
49
48
47
46
45
A
76
77
78
79
80
81
82
83
84
A
A
10L
11L
A
A
A
N/C
A
LB
UB
CE
L
L
L
R
UB
R
R
SEM
L
CE
R/W
L
7024
FP84
SEM
GND
R/W
OE
R
44
43
42
(4)
VCC
1
2
OE
L
R
84-Pin Flatpack
Top View
I/O0L
I/O1L
GND
I/O2L
I/O3L
I/O4L
3
4
5
6
7
8
9
41
40
39
38
37
36
35
34
33
R
NOTES:
I/O15R
GND
1. All VCC pins must be connected to the power supply.
I/O14R
I/O13R
I/O12R
I/O11R
I/O10R
I/O9R
2. All GND pins must be connected to the ground supply.
3. PLG84 package body is approximately 1.15 in x 1.15 in x .17 in.
FP84 package body is approximately 1.17 in x 1.17 in x .11 in.
4. This package code is used to reference the package diagram.
I/O5L
I/O6L
I/O7L
10
11
12 13 14 15 16 17 18 19 20 21 22 23 24 25
27 28 29 30 31 32
26
2740 drw 02F
6.242
Feb.20.20