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5962-8997202HX PDF预览

5962-8997202HX

更新时间: 2024-02-12 03:15:23
品牌 Logo 应用领域
MSK 视频放大器高压
页数 文件大小 规格书
6页 255K
描述
HIGH SPEED/HIGH VOLTAGE VIDEO AMPLIFIER

5962-8997202HX 技术参数

生命周期:Obsolete零件包装代码:DFM
包装说明:,针数:30
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.33.00.01风险等级:5.75
商用集成电路类型:VIDEO AMPLIFIERJESD-30 代码:R-XDFM-F30
信道数量:1功能数量:1
端子数量:30最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:UNSPECIFIED
封装形状:RECTANGULAR封装形式:FLANGE MOUNT
认证状态:Not Qualified筛选级别:MIL-PRF-38534 Class H
最大供电电压 (Vsup):15 V最小供电电压 (Vsup):15 V
表面贴装:YES温度等级:MILITARY
端子形式:FLAT端子位置:DUAL
Base Number Matches:1

5962-8997202HX 数据手册

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APPLICATION NOTES CON'T  
BLANK INPUT  
VOFF CONTROL INPUT  
The video input can be electrically disconnected from the  
amplifier by applying a TTL high input to the blank pin. When  
this occurs, the output will be set to approximately +VHV. The  
VGAIN and VOFF control pins have little or no effect on the out-  
put when it is in blank mode.  
The brightness (output offset) can be linearly adjusted by  
applying a 0 to VREF DC voltage to the VOFF input pin. The  
output quiescent voltage range is from approximately (5µA)  
(Rp) to (100mA) (Rp) from +VHV. This control voltage is nor-  
mally generated by connecting the VOFF control pin to a 5K  
potentiometer between VREF and ground. The VOFF input pin  
should be bypassed with a 0.1µF capacitor to ground placed as  
close as possible to the hybrid. This DC voltage can be any  
stable system source.  
When the TTL compatible blank input is not used, the pin  
must be connected to ground to enable the amplifier. The blank  
input will float high when left unconnected which will disable  
the video output.  
Keep hybrid power dissipation in mind when adjusting the  
output quiescent voltage. Practically all of the voltage is seen  
across Rp. This power must be taken into account when high  
Rp currents are used. If the quiescent level is set too close to  
+VHV, the power dissipation will be minimal but the rise time  
will suffer slightly. If the quiescent level is set too far from  
VHV, the power dissipation will increase dramatically and the  
output fall time will be limited. The output black level is obvi-  
ously dependent on system requirements but a little experi-  
mentation will strike the optimum balance between power dis-  
sipation and bandwidth. Total current through Rp should be  
limited to less than 290mA when operating from power sup-  
plies greater than 90V. The gain adjust alone can set the AC  
current to 250mA (ie: 250mApp=100Vpp/400). Typically,  
most applications use about 10V from +VHV for a black level.  
VREF OUTPUT  
The MSK 1902 has an on board buffered DC zener reference  
output. The VREF output is nominally 5.5V DC and has full tem-  
perature test limits of 5.2V to 5.8V DC. This output is provided  
for gain and offset adjustment and can source up to 4mA of  
current.  
THERMAL MANAGEMENT  
The MSK 1902 package has mounting holes that allow the  
user to connect the amplifier to a heat sink or chassis. Since  
the package is electrically isolated from the internal circuitry,  
mounting insulators are not required or desired for best thermal  
performance. Use 4 to 6 inch/pounds for mounting the device  
to the heat sink.  
The power dissipation of the amplifier depends mainly on the  
load requirements, bandwidth, pixel size, black level and the  
value of Rp. The following table illustrates a few examples:  
PERCENT OF SIGNAL  
WHITE  
LEVEL  
TOTAL  
AVE. Pd  
BLACK  
LEVEL  
OUTPUT  
VOLTAGE  
OUTPUT  
AVE. Pd  
DEVICE  
TYPE  
+VHV  
BLACK  
0%  
WHITE  
0%  
BLANK  
100%  
20%  
0V  
90V  
0V  
0W  
13.3W  
0W  
1902-6  
1902-6  
1902-4  
1902-4  
120V  
120V  
70V  
110V  
110V  
65V  
20V  
20V  
15V  
15V  
2.5W  
15.7W  
2.5W  
40%  
0%  
40%  
0%  
100%  
20%  
40%  
40%  
50V  
8.4W  
70V  
65V  
10.6W  
This table does not include power dissipation due to output switching since this is dependent on individual load requirements. The input stage power  
dissipation is typically 2.5 watts and is essentially independent of output levels.  
RESOLUTION TABLE FOR A TYPICAL CRT  
Maximun  
Pixel  
Minimum Pixel  
Clock  
Required System  
Bandwidth  
(F-3dB)  
Required Rise Time  
at CRT  
Display  
Resolution  
Time  
Frequency  
320 x 200  
640 x 350  
182nS  
52nS  
5MHz  
19MHz  
26MHz  
38MHz  
80MHz  
90MHz  
112MHz  
170MHz  
360MHz  
1.2GHz  
60nS  
17nS  
6MHz  
20MHz  
28MHz  
41MHz  
84MHz  
95MHz  
120MHz  
180MHz  
380MHz  
1.23GHz  
640 x 480  
38nS  
12.5nS  
8.6nS  
4.2nS  
3.7nS  
2.9nS  
1.9nS  
1nS  
800 x 560  
26nS  
1024 x 900  
1024 x 1024  
1280 x 1024  
1664 x 1200  
2048 x 2048  
4096 x 3300  
12.6nS  
11nS  
8.9nS  
5.8nS  
2.8nS  
860pS  
280pS  
All data assumes retrace time equal to 30% of frame time and a 60Hz refresh rate.  
Rev. B 2/03  
4

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