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5962-8876404XX PDF预览

5962-8876404XX

更新时间： 2024-01-19 13:48:50
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
16页 286K
描述
High Speed , 8-Channel, 8-Bit CMOS ADC

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5962-8876404XX 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：DIP
包装说明：DIP,针数：28
Reach Compliance Code：unknown风险等级：5.7
Is Samacsys：N最大模拟输入电压：5 V
最小模拟输入电压：最长转换时间：2 µs
转换器类型：ADC, FLASH METHODJESD-30 代码：R-GDIP-T28
JESD-609代码：e0湿度敏感等级：NOT APPLICABLE
模拟输入通道数量：8位数：8
功能数量：1端子数量：28
最高工作温度：125 °C最低工作温度：-55 °C
输出位码：BINARY, COMPLEMENTARY OFFSET BINARY输出格式：PARALLEL, 8 BITS
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DIP
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT APPLICABLE采样速率：0.05 MHz
采样并保持/跟踪并保持：TRACK座面最大高度：5.59 mm
标称供电电压：5 V表面贴装：NO
技术：CMOS温度等级：MILITARY
端子面层：TIN LEAD端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT APPLICABLE宽度：15.24 mm
Base Number Matches：1

5962-8876404XX 数据手册

 浏览型号5962-8876404XX的Datasheet PDF文件第4页浏览型号5962-8876404XX的Datasheet PDF文件第5页浏览型号5962-8876404XX的Datasheet PDF文件第6页浏览型号5962-8876404XX的Datasheet PDF文件第8页浏览型号5962-8876404XX的Datasheet PDF文件第9页浏览型号5962-8876404XX的Datasheet PDF文件第10页 
AD7824/AD7828  
interest. It is important that the amplifier driving the AD7824/  
AD7828 analog inputs have sufficient loop gain at the input signal  
frequency as to make the output impedance low.  
INPUT CURRENT  
Due to the novel conversion techniques employed by the AD7824/  
AD7828, the analog input behaves somewhat differently than in  
conventional devices. The ADC’s sampled-data comparators  
take varying amounts of input current depending on which cycle  
the conversion is in.  
Suitable op amps for driving the AD7824/AD7828 are the AD544  
or AD644.  
The equivalent input circuit of the AD7824/AD7828 is shown  
in Figure 8. When a conversion starts (CS and RD going low),  
all input switches close, and the selected input channel is con-  
nected to the most significant and least significant comparators.  
Therefore, the analog input is simultaneously connected to  
31 input capacitors of 1 pF each.  
INHERENT SAMPLE-HOLD  
A major benefit of the AD7824’s and AD7828’s analog input  
structure is its ability to measure a variety of high speed signals  
without the help of an external sample-and-hold. In a conven-  
tional SAR type converter, regardless of its speed, the input  
must remain stable to at least 1/2 LSB throughout the conversion  
process if rated accuracy is to be maintained. Consequently, for  
many high speed signals, this signal must be externally sampled  
and held stationary during the conversion. The AD7824/AD7828  
input comparators, by nature of their input switching, inherently  
accomplish this sample-and-hold function. Although the conver-  
sion time for AD7824/AD7828 is 2 µs, the time for which any  
selected analog input must be 1/2 LSB stable is much smaller.  
The AD7824/AD7828 tracks the selected input channel for  
approximately 1 µs after conversion start. The value of the analog  
input at that instant (1 µs from conversion start) is the measured  
value. This value is then used in the least significant flash to  
generate the lower four bits of data.  
C
S
2pF  
1pF  
R
R
ON  
R MUX  
S
AIN1  
•
•
•
V
IN  
C
S
12pF  
TO LS  
LADDER  
1pF  
15LSB  
COMPARATORS  
1pF  
•
•
•
R
ON  
AD7824/  
AD7828  
TO MS  
SINUSOIDAL INPUTS  
1pF  
LADDER  
The AD7824/AD7828 can measure input signals with slew rates  
as high as 157 mV/µs to the rated specifications. This means that  
the analog input frequency can be up to 10 kHz without the aid  
of an external sample-and-hold. Furthermore, the AD7828 can  
measure eight 10 kHz signals without a sample-and-hold. The  
Nyquist criterion requires that the sampling rate be twice the  
input frequency (i.e., 2 × 10 kHz). This requires an ideal anti-  
aliasing filter with an infinite roll-off. To ease the problem of  
antialiasing filter design, the sampling rate is usually much greater  
16MSB  
COMPARATORS  
Figure 8. AD7824/AD7828 Equivalent Input Circuit  
The input capacitors must charge to the input voltage through  
the on resistance of the analog switches (about 3 kΩ to 6 kΩ). In  
addition, about 14 pF of input stray capacitance must be charged.  
The analog input for any channel can be modelled as an RC  
network, as shown in Figure 9. As RS increases, it takes longer  
for the input capacitance to charge.  
than the Nyquist criterion. The maximum sampling rate (FMAX  
for the AD7824/AD7828 can be calculated as follows:  
)
1
FMAX  
=
=
R
350⍀  
R MUX  
ON  
tCRD + tP  
R
800⍀  
S
AIN1  
C
C
S2  
2pF  
S1  
V
31pF  
1
IN  
12pF  
FMAX  
= 400 kHz  
2E – 6 + 0.5E – 6  
t
CRD = AD7824/AD7828 Conversion Time  
tP = Minimum Delay Between Conversion  
Figure 9. RC Network Model  
This permits a maximum sampling rate of 50 kHz for each of  
the eight channels when using the AD7828 and 100 kHz for  
each of the four channels when using the AD7824.  
The time for which the input comparators track the analog input  
is approximately 1 µs at the start of conversion. Because of input  
transients on the analog inputs, it is recommended that a source  
impedance no greater than 100 Ω be connected to the analog  
inputs. The output impedance of an op amp is equal to the open  
loop output impedance divided by the loop gain at the frequency of  
REV. F  
–7–  
1...45678910...16

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