Datasheet > 5962-3826705QNQ

5962-3826705QNQ

更新时间： 2024-01-15 08:37:44

品牌	Logo	应用领域
麦斯威 - MAXWELL		存储可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
40页	315K
描述
MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON

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5962-3826705QNQ 技术参数

生命周期：	Obsolete	零件包装代码：	DFP
包装说明：	DFP,	针数：	32
Reach Compliance Code：	compliant	ECCN代码：	3A001.A.2.C
HTS代码：	8542.32.00.51	风险等级：	5.04
最长访问时间：	150 ns	其他特性：	100 YEAR DATA RETENTION
数据保留时间-最小值：	100	JESD-30 代码：	R-CDFP-F32
长度：	20.828 mm	内存密度：	1048576 bit
内存集成电路类型：	EEPROM	内存宽度：	8
功能数量：	1	端子数量：	32
字数：	131072 words	字数代码：	128000
工作模式：	SYNCHRONOUS	最高工作温度：	125 °C
最低工作温度：	-55 °C	组织：	128KX8
封装主体材料：	CERAMIC, METAL-SEALED COFIRED	封装代码：	DFP
封装形状：	RECTANGULAR	封装形式：	FLATPACK
并行/串行：	PARALLEL	编程电压：	5 V
认证状态：	Not Qualified	筛选级别：	MIL-STD-883
座面最大高度：	3.1242 mm	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	MILITARY	端子形式：	FLAT
端子节距：	1.27 mm	端子位置：	DUAL
宽度：	11.049 mm	最长写入周期时间 (tWC)：	10 ms
Base Number Matches：	1

5962-3826705QNQ 数据手册

4. QUALITY ASSURANCE PROVISIONS

4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-

PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not

affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance

with MIL-PRF-38535, appendix A.

4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on

all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with

method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.

4.2.1 Additional criteria for device class M.

a. Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in) electrical

parameters of method 5004 and substitute lines 1 through 6 of table IIA herein.

b. Prior to burn-in, the devices shall be programmed (see 4.5.2 herein) with a checkerboard pattern or equivalent

(manufacturers at their option may employ an equivalent pattern provided it is a topologically true alternating bit pattern).

The pattern shall be read before and after burn-in. Devices having bits not in the proper state after burn-in shall constitute

a device failure and shall be included in the PDA calculation and shall be removed from the lot.

c. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available

to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power

dissipation, as applicable, in accordance with the intent specified in test method 1015.

(1) Dynamic burn-in (method 1015 of MIL-STD-883, test condition D; for circuit, see 4.2.1c herein).

d. Interim and final electrical parameters shall be as specified in table IIA herein.

e. After the completion of all screening, the device shall be erased and verified prior to delivery.

4.2.2 Additional criteria for device classes Q and V.

a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device

manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document

revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535

and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs,

outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-

STD-883.

b. Interim and final electrical test parameters shall be as specified in table IIA herein.

c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in appendix B of

MIL-PRF-38535.

4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in

accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups

A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).

4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-

38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for device class

M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class

M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through

4.4.4).

SIZE

STANDARD

MICROCIRCUIT DRAWING

5962-38267

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43216-5000

REVISION LEVEL

SHEET

DSCC FORM 2234

APR 97

1...4 5 678 9 10...40

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与5962-3826705QNQ相关器件

型号	品牌	描述	获取价格	数据表
5962-3826705QNV	MAXWELL	MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON	获取价格
5962-3826705QTM	MAXWELL	MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON	获取价格
5962-3826705QTQ	MAXWELL	MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON	获取价格
5962-3826705QTV	MAXWELL	MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON	获取价格
5962-3826705QUM	MAXWELL	MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON	获取价格
5962-3826705QUQ	MAXWELL	MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON	获取价格

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