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56F84451VLF PDF预览

56F84451VLF

更新时间: 2022-09-22 09:42:03
品牌 Logo 应用领域
飞思卡尔 - FREESCALE /
页数 文件大小 规格书
67页 988K
描述
MC56F844xx Advance

56F84451VLF 数据手册

 浏览型号56F84451VLF的Datasheet PDF文件第2页浏览型号56F84451VLF的Datasheet PDF文件第3页浏览型号56F84451VLF的Datasheet PDF文件第4页浏览型号56F84451VLF的Datasheet PDF文件第6页浏览型号56F84451VLF的Datasheet PDF文件第7页浏览型号56F84451VLF的Datasheet PDF文件第8页 
Overview  
Table 1. 56F844x/5x/7x Family (continued)  
Part  
MC56F84  
Number  
789 786 769 766 763 553 550 543 540 587 585 567 565 462 452 451 442 441  
Standard  
channels  
4
1
4
1
1
1
0
1
0
2x  
12  
1x  
12,  
1x9  
2x  
12  
1x 1x9 1x9 1x6 1x9 1x6  
12,  
1x9  
PWMB  
with input  
capture:  
Standard  
channels  
1x 1x7 1x 1x7  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12  
12  
DAC  
1
1
1
1
1
1
1
1
1
0
1
0
1
0
1
0
1
0
1
1
1
1
0
1
0
1
1
1
0
1
0
1
0
1
0
1
Quad  
Decoder  
DMA  
CMP  
Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes  
4
3
3
2
1
4
3
2
2
1
4
3
3
2
1
4
3
2
2
1
4
2
4
2
3
2
4
2
3
2
2
2
1
4
3
3
2
1
4
3
2
2
1
4
3
3
2
1
4
3
2
2
1
4
2
4
2
3
2
4
2
3
2
QSCI  
QSPI  
2
2
2
2
2
2
2
2
2
I2C/SMBus  
FlexCAN  
2
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
0
0
LQFP  
100 80 100 80  
64  
64  
48  
64  
48 100 80 100 80  
64  
64  
48  
64  
48  
package  
pin count  
1. This total assumes no FlexNVM is used with FlexRAM for EEPROM.  
1.2 56800EX 32-bit Digital Signal Controller Core  
• Efficient 32-bit 56800EX Digital Signal Processor (DSP) engine with modified dual  
Harvard architecture  
• Three internal address buses  
• Four internal data buses: two 32-bit primary buses, one 16-bit secondary data  
bus, and one 16-bit instruction bus  
• 32-bit data accesses  
• Support for concurrent instruction fetches in the same cycle and dual data  
accesses in the same cycle  
• 20 addressing modes  
• As many as 60 million instructions per second (MIPS) at 60 MHz core frequency  
• 162 basic instructions  
• Instruction set supports both fractional arithmetic and integer arithmetic  
• 32-bit internal primary data buses supporting 8-bit, 16-bit, and 32-bit data movement,  
addition, subtraction, and logical operation  
• Single-cycle 16 × 16-bit -> 32-bit and 32 x 32-bit -> 64-bit multiplier-accumulator  
(MAC) with dual parallel moves  
MC56F844xx Advance Information Data Sheet, Rev. 2, 06/2012.  
Freescale Semiconductor, Inc.  
5
Preliminary  
General Business Information  

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