54F646

更新时间： 2024-01-14 22:59:26

品牌	Logo	应用领域
美国国家半导体 - NSC		/
页数	文件大小	规格书
12页	204K
描述
Octal Transceiver/Register with TRI-STATE Outputs

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技术参数
数据手册

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54F646 技术参数

生命周期：	Active	包装说明：	,
Reach Compliance Code：	compliant	风险等级：	5.77
Base Number Matches：	1

54F646 数据手册

Unit Loading/Fan Out

54F/74F

Pin Names

Description

U.L.

Input I /I

IH IL

Output I /I

HIGH/LOW

OH OL

A –A

Data Register A Inputs/

TRI-STATE Outputs

Data Register B Inputs/

TRI-STATE Outputs

3.5/1.083

600/106.6 (80)

3.5/1.083

600/106.6 (80)

1.0/1.0

70 mA/ 650 mA

12 mA/64 mA (48 mA)

B –B

70 mA/ 650 mA

12 mA/64 mA (48 mA)

20 mA/ 0.6 mA

CPAB, CPBA Clock Pulse Inputs

20 mA/ 0.6 mA

SAB, SBA

Select Inputs

1.0/1.0

20 mA/ 0.6 mA

Output Enable Input

Direction Control Input

1.0/1.0

DIR

1.0/1.0

Function Table

Inputs

Data I/O*

Function

DIR

CPAB

CPBA

SAB

SBA

A –A

B –B

0 7

H or L

Isolation

Input

Clock A Data into A Register

Clock B Data into B Register

A to B ÐReal Time (Transparent Mode)

n n

H or L

Clock A Data into A Register

Output

A Register to B (Stored Mode)

Clock A Data into A Register and Output to B

B to A ÐReal Time (Transparent Mode)

n n

H or L

Clock B Data into B Register

Output

Input

B Register to A (Stored Mode)

Clock B Data into B Register and Output to A

*The data output functions may be enabled or disabled by various signals at the G and DIR Inputs. Data input functions are always enabled; i.e., data at the bus

pins will be stored on every LOW-to-HIGH transition of the clock inputs.

HIGH Voltage Level

LOW Voltage Level

Irrelevant

LOW-to-HIGH Transition

1 234 5 6 7...12

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