54ACT818L

更新时间： 2024-01-16 07:47:52

品牌	Logo	应用领域
美国国家半导体 - NSC		/
页数	文件大小	规格书
10页	155K
描述
8-Bit Diagnostic Register

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技术参数
数据手册

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54ACT818L 技术参数

生命周期：	Active	包装说明：	,
Reach Compliance Code：	compliant	风险等级：	5.7
Is Samacsys：	N	Base Number Matches：	1

54ACT818L 数据手册

Block Diagram

DS100251-5

Functional Description

Data transfers into the diagnostic register occur on the

LOW-to-HIGH transition of DCLK. Mode and SDI determine

what data source will be loaded. The pipeline register is

loaded on the LOW-to-HIGH transition of PCLK. Mode se-

lects whether the data source is the data input or the diag-

nostic register output. Because of the independence of the

clock inputs, data can be shifted in the diagnostic register via

DCLK and loaded into the pipeline register from the data in-

put via PCLK simultaneously, as long as no setup or hold

times are violated. This simultaneous operation is legal.

Function Table

Inputs

Outputs

Diagnostic Reg.

Operation

SDI

MODE

DCLK

PCLK

SDO

Pipeline Reg.

SI SI − 1,

Serial Shift; D₇–D₀Disabled

SO SD_I

PI DI

Normal Load Pipeline Register

Load Diagnostic Register from Y;

DI Disabled

SI YI

SDI

PI SI

Load Pipeline Register from

Diagnostic Register

Hold

Hold Diagnostic Register; DI

Enabled

HIGH Voltage Level

LOW Voltage Level

Immaterial

LOW-to-HIGH Clock Transition

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