Datasheet > 534FD622M080BGR

534FD622M080BGR

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
芯科 - SILICON		振荡器晶体振荡器石英晶振压控振荡器
页数	文件大小	规格书
12页	207K
描述
VOLTAGE-CONTROLLED CRYSTAL OSCILLATOR (VCXO) 10 MHZ TO 1.4 GHZ

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534FD622M080BGR 数据手册

Si550

Table 4. CLK± Output Levels and Symmetry (Continued)

Parameter

Symbol

Test Condition

Min

Typ

Max

Units

Symmetry (duty cycle)

SYM

LVPECL:

LVDS:

CMOS:

– 1.3 V (diff)

—

1.25 V (diff)

Notes:

1. 50 Ω to V_DD– 2.0 V.

2. R_term= 100 Ω (differential).

3. C_L= 15 pF

Table 5. CLK± Output Phase Jitter

Parameter

Symbol

Test Condition

Kv = 45 ppm/V

Min

Typ

Max

Units

1,2,3

Phase Jitter (RMS)

for F > 500 MHz

φ_J

12 kHz to 20 MHz (OC-48)

50 kHz to 80 MHz (OC-192)

—

0.35

0.38

—

OUT

Kv = 90 ppm/V

12 kHz to 20 MHz (OC-48)

50 kHz to 80 MHz (OC-192)

—

0.43

0.41

—

Kv = 135 ppm/V

12 kHz to 20 MHz (OC-48)

50 kHz to 80 MHz (OC-192)

—

0.52

0.46

—

Kv = 180 ppm/V

12 kHz to 20 MHz (OC-48)

50 kHz to 80 MHz (OC-192)

—

0.64

0.52

—

1,2,3

Phase Jitter (RMS)

for F of 125 to 500 MHz

φ_J

Kv = 45 ppm/V

12 kHz to 20 MHz (OC-48)

50 kHz to 80 MHz (OC-192)

—

0.42

0.58

—

OUT

Kv = 90 ppm/V

12 kHz to 20 MHz (OC-48)

50 kHz to 80 MHz (OC-192)

—

0.48

0.60

—

Kv = 135 ppm/V

12 kHz to 20 MHz (OC-48)

50 kHz to 80 MHz (OC-192)

—

0.57

0.64

—

Kv = 180 ppm/V

12 kHz to 20 MHz (OC-48)

50 kHz to 80 MHz (OC-192)

—

0.67

0.68

—

Notes:

1. Differential Modes: LVPECL/LVDS/CML. Refer to AN255, AN256, and AN266 for further information.

2. For best jitter and phase noise performance, always choose the smallest K_Vthat meets the application’s minimum APR

requirements. See “AN266: VCXO Tuning Slope (K_V), Stability, and Absolute Pull Range (APR)” for more information.

3. See “AN255: Replacing 622 MHz VCSO devices with the Si550 VCXO” for comparison highlighting power supply

rejection (PSR) advantage of Si55x versus SAW-based solutions.

Preliminary Rev. 0.3

1 2 345 6 7...12

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