Datasheet > 534BD622M080BGR

534BD622M080BGR

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
芯科 - SILICON		振荡器晶体振荡器石英晶振压控振荡器
页数	文件大小	规格书
12页	207K
描述
VOLTAGE-CONTROLLED CRYSTAL OSCILLATOR (VCXO) 10 MHZ TO 1.4 GHZ

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534BD622M080BGR 数据手册

Si550

Table 3. CLK± Output Frequency Characteristics

Parameter

Symbol

Test Condition

LVDS/CML/LVPECL

CMOS

Min

Typ

—

Max

945

160

Units

1,2,3

Nominal Frequency

MHz

—

1,4

Temperature Stability

∆f/f

T = –40 to +85 ºC

–20

–50

–100

—

+20

+50

+100

ppm

1,4

Absolute Pull Range

Aging

APR

±25

—

±150

±10

ppm

Frequency drift over

15 year life.

Power up Time

t_OSC

—

Notes:

1. See Section 3. "Ordering Information" on page 8 for further details.

2. Specified at time of order by part number. Also available in frequencies from 970 to 1134 MHz and 1213 to 1417 MHz.

3. Nominal output frequency set by V_CNOM= 3/8 x V_DD

4. Selectable parameter specified by part number.

5. Time from power up or tristate mode to f_O.

Table 4. CLK± Output Levels and Symmetry

Parameter

Symbol

Test Condition

mid-level

Min

_DD– 1.42

1.1

Typ

—

Max

V_DD– 1.25

1.9

Units

LVPECL Output Option

V_OD

V_SE

swing (diff)

—

V_PP

swing (single-ended)

mid-level

0.5

—

0.93

1.275

0.50

—

LVDS Output Option

1.125

0.32

—

1.20

0.40

swing (diff)

V_OD

V_O

V_PP

CML Output Option

mid-level

– 0.75

V_OD

V_OH

V_OL

swing (diff)

0.70

0.95

—

1.20

V_DD

V_PP

0.8 x V_DD

CMOS Output Option

= 32 mA

—

I_OL= 32 mA

0.4

Rise/Fall time (20/80%)

t_{R, F}

LVPECL/LVDS/CML

CMOS with CL = 15 pF

—

350

—

Preliminary Rev. 0.3

1 234 5 6 7...12

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