Datasheet > 534CA000193BG

534CA000193BG

更新时间： 2024-02-05 11:44:35

品牌	Logo	应用领域
芯科 - SILICON		机械振荡器
页数	文件大小	规格书
43页	2830K
描述
CMOS Output Clock Oscillator, 77.76MHz Nom, ROHS COMPLIANT, SMD, 8 PIN

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534CA000193BG 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	Reach Compliance Code：	unknown
风险等级：	5.67	其他特性：	IT CAN ALSO OPERATE AT 66 MHZ, 62.208000 MHZ AND 19.440000 MHZ
最长下降时间：	0.35 ns	频率调整-机械：	NO
频率稳定性：	50%	JESD-609代码：	e4
安装特点：	SURFACE MOUNT	标称工作频率：	77.76 MHz
最高工作温度：	85 °C	最低工作温度：	-40 °C
振荡器类型：	CMOS	物理尺寸：	177.8mm x 127.0mm x 41.91mm
最长上升时间：	0.35 ns	最大供电电压：	3.63 V
最小供电电压：	2.97 V	标称供电电压：	3.3 V
表面贴装：	YES	最大对称度：	55/45 %
端子面层：	Nickel/Gold (Ni/Au)	Base Number Matches：	1

534CA000193BG 数据手册

Si534

QUAD FREQUENCY CRYSTAL OSCILLATOR (XO)

(10 MHZ TO 1.4 GHZ)

Features

Si5602

ꢀ

Available with any-rate output

ꢀ

Internal fixed crystal frequency

ensures high reliability and low

aging

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

ꢀ

Four selectable output frequencies ꢀ Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

3rd generation DSPLL with superior

ꢀ

jitter performance

ꢀ

3x better frequency stability than

SAW-based oscillators

ꢀ

Pb-free/RoHS-compliant

Ordering Information:

Applications

See page 7.

ꢀ

SONET/SDH

Networking

SD/HD video

ꢀ

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

Description

(Top View)

The Si534 quad frequency XO utilizes Silicon Laboratories’ advanced

DSPLL circuitry to provide a low jitter clock at high frequencies. The Si534

FS[1]

is available with any-rate output frequency from 10 to 945 MHz and select

frequencies to 1400 MHz. Unlike a traditional XO where a different crystal is

required for each output frequency, the Si534 uses one fixed crystal to

provide a wide range of output frequencies. This IC based approach allows

the crystal resonator to provide exceptional frequency stability and reliability.

In addition, DSPLL clock synthesis provides superior supply noise rejection,

simplifying the task of generating low jitter clocks in noisy environments

typically found in communication systems. The Si534 IC-based XO is factory

configurable for a wide variety of user specifications including frequency,

supply voltage, output format, and temperature stability. Specific

configurations are factory programmed at time of shipment, thereby

eliminating long lead times associated with custom oscillators.

V_DD

CLK–

CLK+

GND

FS[0]

(LVDS/LVPECL/CML)

FS[1]

Functional Block Diagram

V_DD

CLK– CLK+

GND

CLK

Any-rate

10–1400 MHz

DSPLL^®

Fixed

FS[1]

Frequency

FS[0]

Clock

(CMOS)

Synthesis

GND

Rev. 1.0 7/06

Si534

12 3 4 5 6 7...43

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