Datasheet > 530EB628M000BG

530EB628M000BG

更新时间： 2023-01-15 00:00:00

品牌	Logo	应用领域
芯科 - SILICON		/
页数	文件大小	规格书
15页	265K
描述
LVPECL Output Clock Oscillator, 628MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

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530EB628M000BG 数据手册

Si530/531

1. Electrical Specifications

Table 1. Recommended Operating Conditions

Parameter

Symbol

Test Condition

3.3 V option

2.5 V option

1.8 V option

Min

2.97

2.25

1.71

Typ

3.3

2.5

1.8

Max

3.63

2.75

1.89

Units

Supply Voltage

Supply Current

Output enabled

LVPECL

CML

—

121

108

111

LVDS

CMOS

TriState mode

—

0.75 x V

—

Output Enable (OE)

0.5

Operating Temperature Range

–40

ºC

Notes:

1. Selectable parameter specified by part number. See Section 3. "Ordering Information" on page 7 for further details.

2. OE pin includes a 17 kΩ pullup resistor to V_DD. Pulling OE to ground causes outputs to tristate.

3. If the device is powered up below –20 ºC and the ambient temperature rises by approximately 105 ºC during normal

operation, the device will perform a one-time recalibration. The output is squelched for approximately 2–3 ms during

this recalibration.

Table 2. CLK± Output Frequency Characteristics

Parameter

Symbol

Test Condition

LVPECL/LVDS/CML

CMOS

Min

Typ

—

Max

945

160

Units

Nominal Frequency^1,2

MHz

—

Initial Accuracy

Measured at +25 °C at

time of shipping

f_i

—

±1.5

—

ppm

∆f/f

–20

–50

—

+20

+50

Temperature Stability^1,3

Aging

Frequency drift over

projected 15 year life

f_a

—

±10

ppm

Powerup Time⁴

t_OSC

Notes:

1. See Section 3. "Ordering Information" on page 7 for further details.

2. Specified at time of order by part number. Also available in frequencies from 970 to 1134 MHz and 1213 to 1417 MHz.

3. Selectable parameter specified by part number.

4. Time from powerup or tristate mode to f_O.

Rev. 1.0

123 4 5 6 7...15

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