Block Diagram
Block Diagram
VDDR
VDDA
VSSA
VRH
VDDA
VSSA
VRH
Voltage Regulator
VDD1
VSS1,2
VRL
VRL
AN00
AN01
AN02
AN03
AN04
AN05
AN06
AN07
AN08
AN09
AN10
AN11
AN12
AN13
AN14
AN15
PAD00
PAD01
PAD02
PAD03
PAD04
PAD05
PAD06
PAD07
PAD08
PAD09
PAD10
PAD11
PAD12
PAD13
PAD14
PAD15
128K, 256K Bytes Flash or ROM
2K, 4K Bytes EEPROM
6K, 12K Bytes RAM
Analog to
Digital
Single-Wire Background
Debug Module
BKGD
XFC
VDDPLL
VSSPLL
EXTAL
XTAL
Converter
CPU12
Clock and
Periodic Interrupt
COP Watchdog
Clock Monitor
Breakpoints
Reset
PLL
Generation
Module
RESET
TEST
PW0
PW1
PW2
PW3
PW4
PW5
PP0
PP1
PP2
PP3
PP4
PP5
System
PE0
PE1
PE4
PE5
PE6
XIRQ
IRQ
Pulse
Integration
Module
ECLK
MODA
MODB
Width
Modulator
VLCD
VLCD
SDA
SCL
PM0
IIC
PM1
XADDR14
PK0
PK1
PK2
PK3
BP0
BP1
BP2
BP3
PIX0
RXCAN0
XADDR15
PIX1
PIX2
PIX3
PM2
PM3
CAN0
CAN1
TXCAN0
XADDR16
XADDR17
RXCAN1
TXCAN1
PM4
PM5
DATA0
DATA1
PB0
PB1
PB2
PB3
PB4
PB5
FP0
FP1
ADDR0
ADDR1
ADDR2
ADDR3
ADDR4
ADDR5
ADDR6
ADDR7
RXD0
TXD0
PS0
PS1
SCI0
SCI1
DATA2
DATA3
DATA4
DATA5
FP2
FP3
LCD
RXD1
PS2
FP4
Driver
TXD1
PS3
FP5
FP6
FP7
MISO
MOSI
SCK
SS
PS4
PS5
PS6
PS7
DATA6
DATA7
PB6
PB7
SPI
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
DATA8
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
FP8
ADDR8
DATA9
FP9
ADDR9
VDDM1
MOTOR0 and MOTOR1 Supply
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
FP10
FP11
FP12
FP13
FP14
FP15
ADDR10
ADDR11
ADDR12
ADDR13
ADDR14
ADDR15
VSSM1
M0C0M
PU0
PU1
PWM0
PWM1
PWM2
PWM3
M0C0P
MOTOR0
MOTOR1
M0C1M
PU2
M0C1P
PU3
M1C0M
M1C0P
PU4
PU5
Multiplexed Multiplexed
PL0
PL1
PL2
PL3
PL4
PL5
PL6
PL7
FP16
FP17
FP18
FP19
FP28
FP29
FP30
FP31
Narrow
Bus
Wide
Bus
M1C1M
PU6
M1C1P
PU7
VDDM2
VSSM2
MOTOR2 and MOTOR3 Supply
M2C0M
PV0
PWM4
PWM5
PWM6
PWM7
M2C0P
PV1
Pins
shown
in
MOTOR2
MOTOR3
PE2
PE3
PE7
FP20
FP21
FP22
R/W
M2C1M
PV2
PV3
BOLD are not avail-
LSTRB/TAGLO
NOACC/XCLKS
M0C1P
able in the 112 QFP
M3C0M
M3C0P
PV4
PV5
M3C1M
PV6
PV7
PK7
FP23
ECS/ROMCTL
M3C1P
VDDM3
VSSM2
FP24
FP25
FP26
FP27
IOC0
IOC1
IOC2
IOC3
MOTOR4 and MOTOR5 Supply
M4C0M
PW0
PWM8
PWM9
PWM10
PWM11
M4C0P
PW1
MOTOR4
M4C1M
PW2
PW3
IOC4
M4C1P
Input Capture and
Output Compare
Timer
IOC5
IOC6
IOC7
M5C0M
M5C0P
PW4
PW5
MOTOR5
M5C1M
PW6
PW7
KWH0
KWH1
KWH2
KWH3
KWH4
KWH5
KWH6
KWH7
M5C1P
Supply pins
Internal Logic 2.5V
VDD1
I/O Driver 5V
VDDX1,2
VSSX1,2
VSS1,2
A/D Converter 5V &
Voltage Regulator
Reference
Pin
Interrupt
Logic
PLL 2.5V
Vreg Input 5V
VDDR
KWJ0
KWJ1
KWJ2
KWJ3
VDDA
VSSA
VDDPLL
VSSPLL
Figure 1. MC9S12H-Family Block Diagram
16-bit Microcontroller HCS12H Family, Rev. 11.1
6
Freescale Semiconductor
PRELIMINARY
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