PIN CONNECTIONS
PIN CONNECTIONS
RXD
TXD
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
NC*
L1
MISO
L2
MOSI
NC*
NC*
LS1
PGND
LS2
SCLK
CS
* Special Configuration Recommended /
Mandatory for Marked NC Pins
ADOUT0
PWMIN
Figure 3. 33911 Pin Connections
Table 1. 33911 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on page 20.
Pin
Pin Name
Formal Name
Definition
This pin is the receiver output of the LIN interface which reports the state of
the bus voltage to the MCU interface.
1
RXD
Receiver Output
This pin is the transmitter input of the LIN interface which controls the state of
the bus output.
2
3
TXD
Transmitter Input
SPI Output
SPI (Serial Peripheral Interface) data output. When CS is high, pin is in the
high-impedance state.
MISO
SPI (Serial Peripheral Interface) data input.
SPI (Serial Peripheral Interface) clock Input.
SPI (Serial Peripheral Interface) chip select input pin. CS is active low.
Analog Multiplexer Output.
4
5
6
7
8
MOSI
SCLK
SPI Input
SPI Clock
CS
SPI Chip Select
Analog Output Pin 0
PWM Input
ADOUT0
PWMIN
High side and low side pulse-width modulation input.
Bidirectional reset I/O pin - driven low when any internal reset source is
asserted. RST is active low.
9
RST
IRQ
Internal Reset I/O
Interrupt output pin, indicating wake-up events from Stop Mode or events from
Normal and Normal Request Modes. IRQ is active low.
Internal Interrupt
Output
10
33911
Analog Integrated Circuit Device Data
Freescale Semiconductor
3