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2SJ0674G PDF预览

2SJ0674G

更新时间: 2024-11-19 21:21:19
品牌 Logo 应用领域
松下 - PANASONIC 开关光电二极管晶体管
页数 文件大小 规格书
3页 299K
描述
Small Signal Field-Effect Transistor, 0.1A I(D), 30V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, ROHS COMPLIANT, SSSMINI3-F2, 3 PIN

2SJ0674G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete包装说明:SMALL OUTLINE, R-PDSO-F3
针数:3Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8541.21.00.95
风险等级:5.82配置:SINGLE
最小漏源击穿电压:30 V最大漏极电流 (ID):0.1 A
最大漏源导通电阻:30 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JESD-30 代码:R-PDSO-F3JESD-609代码:e6
湿度敏感等级:1元件数量:1
端子数量:3工作模式:DEPLETION MODE
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
极性/信道类型:P-CHANNEL认证状态:Not Qualified
表面贴装:YES端子面层:Tin/Bismuth (Sn/Bi)
端子形式:FLAT端子位置:DUAL
处于峰值回流温度下的最长时间:10晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

2SJ0674G 数据手册

 浏览型号2SJ0674G的Datasheet PDF文件第2页浏览型号2SJ0674G的Datasheet PDF文件第3页 
This product complies with the RoHS Directive (EU 2002/95/EC).  
Silicon MOS FETs (Small Signal)  
2SJ0674  
Silicon P-channel MOS FET  
For switching circuits  
Features  
Package  
Low ON resistance Ron  
Code  
High-speed switching  
SSSMini3-F1  
Pin Name  
1: Gate  
SSSMini type package, allowing downsizing of the equipment and
automatic insertion through the tape packing  
2: ource  
Absolute Maximum Ratings Ta = 25°C  
Parameter  
Drain-source surrender voltage  
Gate-source surrender voltage  
Drain current  
Symbol  
VDSS  
VGSS  
I
Ratin
-0  
Unit  
V
Marking Symbol: 5U  
V
±
mA  
mA  
mW  
°C  
-
Peak drain current  
IDP  
-200  
Power dissipation  
PD  
100  
Channel temperature  
Storage temperature  
T
h  
125  
T
stg  
–55 to +125  
°C  
Electrical Characteristics Ta = 25°C±
Paraer  
Drain-source surrenltage  
Din-source cutofcurrent  
Gate-ource coff current  
Gate threshold v
Sy
Conditions  
Min  
Typ  
Max  
Unit  
V
VDSS  
IDSS  
IGSS  
VTH  
ID = -10 mA, VGS = 0  
-30  
VDS = -20 V, VGS = 0  
-1.0  
±10  
-1.5  
30  
mA  
mA  
V
VGS = ±10 V, VDS = 0  
ID = -1.0 mA, VDS = -3.0 V  
ID = -10 mA, VGS = -2.5 V  
ID = -10 mA, VGS = -4.0 V  
ID = -10 mA, VDS = -3 V, f = 1 kHz  
- 0.5  
-1.0  
13  
9
Drain-source ON resi
Forward transfer admittance  
RDS(on)  
W
mS  
pF  
18  
20  
40  
Yfs  
Short-circuit input capacitance  
(Common source)  
Ciss  
12  
13  
7
Short-circuit output capacitance  
(Common source)  
Coss  
Crss  
VDS = -3 V, VGS = 0, f = 1 MHz  
pF  
pF  
Reverse transfer capacitance  
(Common source)  
Turn-on time *  
Turn-off time *  
ton  
toff  
VDD =-3V,VGS =0Vto-3V,ID =-10mA  
VDD =-3V,VGS =-3Vto0V,ID =-10mA  
300  
400  
ns  
ns  
Note) 1. Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 measuring methods for transistors.  
2. : ton , toff measurement circuit  
*
VOUT  
280 Ω  
VGS  
10%  
90%  
V
GS = 0 V to 3 V  
90%  
100 µF  
VDD = −3.0 V  
10%  
50 Ω  
VOUT  
ton  
toff  
Publication date: May 2008  
SJF00045BED  
1

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