Datasheet > 2EDN7523F

2EDN7523F

更新时间： 2022-02-26 10:27:37

品牌	Logo	应用领域
英飞凌 - INFINEON		/
页数	文件大小	规格书
31页	1082K
描述
Highly efficient SMPS enabled by 5 ns fast slew rates and 17 ns propagation delay precision for fast MOSFET and GaN switching

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数据手册

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2EDN7523F 数据手册

EiceDRIVER™

2EDN752x / 2EDN852x

Pin Configuration and Description

The pin configuration for all input versions of 2EDN7524F, 2EDN7523F, 2EDN8524F and 2EDN8523F in the PG-

DSO-8-60 package is shown in Figure 1. Drawings can be viewed in Chapter 8 (PG-DSO-8-60).

ENA

INA

ENB

OUTA

VDD

GND

INB

OUTB

Figure 1

Table 3

Pin Configuration PG-DSO-8-60, Top View

Pin Configuration 2EDN7524F, 2EDN7523F, 2EDN8524F and 2EDN8523F in the PG-DSO-8-60

Package

Pin Symbol Description

ENA

Enable input channel A

Logic input; if ENA is high or left open, OUTA is controlled by INA; ENA low causes OUTA low

INA

Input signal channel A

Logic input, controlling OUTA (inverting or non-inverting)

GND

INB

Ground

Input signal channel B

Logic input, controlling OUTB (inverting or non-inverting)

OUTB

VDD

Driver output channel B

Low-impedance output with source and sink capability

Positive supply voltage

Operating range 4.5 V/8.6V to 20 V

OUTA

ENB

Driver output channel A

Low-impedance output with source and sink capability

Enable input channel B

Logic Input; if ENB is high or left open, OUTB is controlled by INB; ENB low causes OUTB low

Data Sheet

Revision2.3

2016-10-05

1...3 4 567 8 9...31

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