Datasheet > 28F800F3

28F800F3

更新时间： 2022-11-27 09:03:39

品牌	Logo	应用领域
英特尔 - INTEL		闪存
页数	文件大小	规格书
47页	274K
描述
FAST BOOT BLOCK FLASH MEMORY FAMILY 8 AND 16 MBIT

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28F800F3 数据手册

FAST BOOT BLOCK DATASHEET

2.0 PRODUCT DESCRIPTION

to the 16-Mbit density. The family is available in

µBGA CSP and 56-lead SSOP packages. Pinouts

for the 8- and 16-Mbit components are illustrated in

Figures 1 and 2.

This section describes the pinout and block

architecture of the device family.

2.2

Pin Description

2.1

Pinouts

The pin description table describes pin usage.

Intel’s Fast Boot Block flash memory family

provides upgrade paths in each package pinout up

A₁₅

A₁₄

A₁₂

A₁₁

GND CLK

V_CC

V_PP

A₄

A₅

A₁

A₂

32M

16M

A₈

A₉

A₂₀

ADV# WE#

RST# WP#

A₁₉

A₁₇

A₇

64M

A₁₃

A₁₀

A₂₁

A₁₈

A₆

A₃

V_CCQ

DQ₇

DQ₁₅

DQ₁₃DQ₁₂

DQ₄

V_CC

DQ₁₁DQ₁₀

DQ₉

DQ₁

DQ₈

DQ₀

OE#

GND

CE#

A₀

A₁₆

DQ₆

DQ₅

DQ₃

DQ₂

WAIT# GND DQ₁₄GND

V_CCQ

NOTES:

1. Shaded connections indicate upgrade address connections. Lower density devices will not have upper address solder

balls. Routing is not recommended in this area.

2. A₂₀and A₂₁are the upgrade address for potential 32-Mbit and 64-Mbit devices (currently not on road map).

3. Reference the Micro Ball Grid Array Package Mechanical Specification and Media Informationon Intel’s World Wide Web

home page for detailed package specifications.

Figure 1. 56-Ball µBGA* Package Pinout (Top View, Ball Down)

PRODUCT PREVIEW

1...3 4 567 8 9...47

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