28F400BX-T/B, 28F004BX-T/B
Ý
Ý
When the CE and RP pins are at V
BYTE pin (28F400BX-only) is at either V
Program and Erase Automation allows program
and erase operations to be executed using a two-
write command sequence to the CUI. The internal
Write State Machine (WSM) automatically executes
the algorithms and timings necessary for program
and erase operations, including verifications, there-
by unburdening the microprocessor or microcontrol-
ler. Writing of memory data is performed in word or
byte increments for the 28F400BX family and in byte
increments for the 28F004BX family typically within
9 ms which is a 100% improvement over current
flash memory products.
and the
CC
Ý
or
CC
GND the CMOS Standby mode is enabled where
is typically 50 mA.
I
CC
A Deep Power-Down Mode is enabled when the
Ý
RP pin is at ground minimizing power consumption
and providing write protection during power-up con-
current during deep power-down mode
is 0.20 mA typical. An initial maximum access time
ditions. I
CC
Ý
or Reset Time of 300 ns is required from RP
switching until outputs are valid. Equivalently, the
device has a maximum wake-up time of 215 ns until
writes to the Command User Interface are recog-
The Status Register (SR) indicates the status of the
WSM and whether the WSM successfully completed
the desired program or erase operation.
Ý
nized. When RP is at ground the WSM is reset, the
Status Register is cleared and the entire device is
protected from being written to. This feature pre-
vents data corruption and protects the code stored
in the device during system reset. The system Reset
pin can be tied to RP to reset the memory to nor-
mal read mode upon activation of the Reset pin.
With on-chip program/erase automation in the
Maximum Access Time of 60 ns (t
over the commercial temperature range (0 C to
) is achieved
§
ACC
Ý
70 C), 5% V
supply voltage range (4.75V to
§
CC
5.25V) and 30 pF output load. Maximum Access
Time of 70 ns (t ) is achieved over the commer-
cial temperature range, 10% V supply range (4.5V
ACC
Ý
4-Mbit family and the RP functionality for data pro-
CC
to 5.5V) and 100 pF output load.
tection, when the CPU is reset and even if a program
or erase command is issued, the device will not rec-
Ý
ognize any operation until RP returns to its normal
state.
I
maximum Program current is 40 mA for x16
operation and 30 mA for x8 operation. I Erase
PP
PP
current is 30 mA maximum. V erase and pro-
PP
gramming voltage is 11.4V to 12.6V (V
e
12V
5%) under all operating conditions. As an op-
For the 28F400BX, Byte-wide or Word-wide In-
put/Output Control is possible by controlling the
PP
g
tion, V can also vary between 10.8V to 13.2V (V
e
block erase cycles.
Ý
Ý
BYTE pin. When the BYTE pin is at a logic low
the device is in the byte-wide mode (x8) and data is
PP
PP
10%) with a guaranteed number of 100
g
12V
[ ]
read and written through DQ 0:7 . During the byte-
[
]
wide mode, DQ 8:14 are tri-stated and DQ15/A-1
becomes the lowest order address pin. When the
Typical I Active Current of 25 mA is achieved
CC
for the X16 products (28F400BX). Typical I
Ý
BYTE pin is at a logic high the device is in the
word-wide mode (x16) and data is read and written
Ac-
tive Current of 20 mA is achieved for the X8 prod-
CC
[ ]
through DQ 0:15 .
ucts (28F400BX, 28F004BX). Refer to the I active
CC
current derating curves in this datasheet.
The 4-Mbit boot block flash memory family is also
designed with an Automatic Power Savings (APS)
feature to minimize system battery current drain and
allows for very low power designs. Once the device
is accessed to read array data, APS mode will imme-
diately put the memory in static mode of operation
where I
active current is typically 1 mA until the
CC
next read is initiated.
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