Contents
16 Test Reset Timings.....................................................................................................................45
17 Quick Start/Deep Sleep Timing (BCLK Stopping Method) .........................................................46
18 Quick Start/Deep Sleep Timing (DPSLP# Assertion Method) ....................................................46
19 BCLK (Single Ended)/PICCLK Generic Clock Waveform ..........................................................48
20 Maximum Acceptable Overshoot/Undershoot Waveform...........................................................49
21 VTTPWRGD Noise Specification ...............................................................................................52
22 Micro FC-BGA Package – Top and Bottom Isometric Views .....................................................54
23 Micro FC-BGA Package – Top and Side Views .........................................................................54
24 Micro FC-BGA Package – Bottom View .....................................................................................55
25 Ball Map – Top View...................................................................................................................56
Tables
1
New and Revised Ultra-Low Voltage Intel® Celeron® Processor (0.13 µ) Signals.....................14
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3
4
5
6
7
8
9
Clock State Characteristics ........................................................................................................16
Ultra-Low Voltage Intel® Celeron® Processor CPUID ................................................................17
Ultra-Low Voltage Intel® Celeron® Processor CPUID Cache and TLB Descriptors...................17
System Signal Groups................................................................................................................19
Recommended Resistors for Ultra-Low Voltage Intel® Celeron® Processor Signals .................20
PLL Filter Inductor Recommendations .......................................................................................25
PLL Filter Capacitor Recommendations.....................................................................................25
PLL Filter Resistor Recommendations .......................................................................................25
10 Ultra-Low Voltage Intel® Celeron® Processor VID Values .........................................................26
11 VTTPWRGD Noise Specification ...............................................................................................27
12 VTTPWRGD Transition Time Specification................................................................................27
13 Ultra-Low Voltage Intel® Celeron® Processor Absolute Maximum Ratings................................29
14 Power Specifications for the Ultra-Low Voltage Intel® Celeron® Processor...............................30
15 VCC Tolerances for the Ultra-Low Voltage Intel® Celeron® Processor: VID = 1.1 V .................31
16 VCC Tolerances for the Ultra-Low Voltage Intel® Celeron® Processor in the
Deep Sleep State: VID = 1.1 V...................................................................................................31
17 VCC Tolerances for the Ultra-Low Voltage Intel® Celeron® Processor: VID = 0.95 V ...............32
18 VCC Tolerances for the Ultra-Low Voltage Intel® Celeron® Processor in the
Deep Sleep State: VID = 0.95 V.................................................................................................32
19 AGTL Signal Group DC Specifications.......................................................................................32
20 AGTL Bus DC Specifications......................................................................................................33
21 CLKREF, APIC, TAP, CMOS, and Open-drain Signal Group DC Specifications.......................33
22 System Bus Clock AC Specifications .........................................................................................35
23 Valid Ultra-Low Voltage Intel® Celeron® Processor Frequencies...............................................35
24 AGTL Signal Groups AC Specifications .....................................................................................35
25 CMOS and Open-drain Signal Groups AC Specifications..........................................................36
26 Reset Configuration AC Specifications and Power On/Power Down Timings............................36
27 APIC Bus Signal AC Specifications............................................................................................37
28 TAP Signal AC Specifications ....................................................................................................38
29 Quick Start/Deep Sleep AC Specifications.................................................................................39
30 BCLK (Differential) DC Specifications and AC Signal Quality Specifications.............................47
31 BCLK (Single Ended) DC Specifications and AC Signal Quality Specifications.........................47
32 PICCLK DC Specifications and AC Signal Quality Specifications..............................................48
33 100-MHz AGTL Signal Group Overshoot/Undershoot Tolerance
at the Processor Core.................................................................................................................49
6
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