Datasheet > 251PM

251PM

更新时间： 2022-02-26 12:27:41

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
10页	90K
描述
Field Programmable SS VersaClock Synthesizer

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251PM 数据手册

ICS251 DATASHEET

Pin Assignment

Output Clock Selection Table

CLK (MHz)

Spread

Percentage

User

Configurable

User

Configurable

User

Configurable

User

Configurable

S 0

V D D

P D T S

G N D

User

Configurable

User

Configurable

User

Configurable

User

Configurable

X 1 / I C L K

X 2

S 1

C L K

8-pin (150 mil) SOIC

Pin Descriptions

Pin Description

Number

Name

Type

VDD

X1/ICLK

Input

Power

Select pin 0 for frequency selection on CLK. Internal pull-up resistor.

Connect to +3.3 V.

Connect this pin to a crystal or external clock input.

Connect this pin to a crystal, or float for clock input.

CLK

Output Clock output. Weak internal pull-down when tri-state.

Input

Select pin 1 for frequency selection on CLK. Internal pull-up resistor.

Connect this to Ground.

GND

Power

Powers down entire chip. Tri-states CLK outputs when low. No internal pull-up

resistor. The pin must be tied either directly or through the external resistor to

VDD or GND. External resistor value must be less than 15kOhm.

PDTS

Input

External Components

The ICS251 requires a minimum number of external

components for proper operation.

increased in this trimming process, it is important to keep stray

capacitance to a minimum by using very short PCB traces

(and no vias) been the crystal and device. Crystal capacitors

must be connected from each of the pins X1 and X2 to ground.

Series Termination Resistor

Clock output traces over one inch should use series

termination. To series terminate a 50 trace (a commonly

used trace impedance), place a 33 resistor in series with the

clock line, as close to the clock output pin as possible. The

nominal impedance of the clock output is 20.

The value (in pF) of these crystal caps should equal (C -6

pF)*2. In this equation, C = crystal load capacitance in pF.

Example: For a crystal with a 16 pF load capacitance, each

crystal capacitor would be 20 pF [(16-6) x 2] = 20.

Decoupling Capacitor

As with any high-performance mixed-signal IC, the ICS251

must be isolated from system power supply noise to perform

optimally.

A decoupling capacitor of 0.01µF must be connected between

VDD and the PCB ground plane.

Crystal Load Capacitors

The device crystal connections should include pads for small

capacitors from X1 to ground and from X2 to ground. These

capacitors are used to adjust the stray capacitance of the

board to match the nominally required crystal load

capacitance. Because load capacitance can only be

FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER

REVISION E 05/19/14

123 4 5 6 7...10

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