PRELIMINARY
Élan™SC520 Microcontroller
Integrated 32-Bit Microcontroller with PC/AT-Compatible Peripherals,
PCI Host Bridge, and Synchronous DRAM Controller
DISTINCTIVE CHARACTERISTICS
■ Industry-standard Am5x86® CPU with floating
■ ROM/Flash controller for 8-, 16-, and 32-bit devices
point unit (FPU) and 16-Kbyte write-back cache
■ Enhanced PC/AT-compatible peripherals
– 100-MHz and 133-MHz operating frequencies
– Low-voltage operation (core VCC = 2.5 V)
– 5-V tolerant I/O (3.3-V output levels)
provide improved performance
– Enhanced programmable interrupt controller
(PIC) prioritizes 22 interrupt levels (up to 15
external sources) with flexible routing
■ E86™ family of x86 embedded processors
– Enhanced DMA controller includes double buffer
chaining, extended address and transfer counts,
and flexible channel routing
– Part of a software-compatible family of
microprocessors and microcontrollers well
supported by a wide variety of development tools
– Two 16550-compatible UARTs operate at baud
rates up to 1.15 Mbit/s with optional DMA interface
■ Integrated PCI host bridge controller leverages
standard peripherals and software
■ Standard PC/AT-compatible peripherals
– 33 MHz, 32-bit PCI bus Revision 2.2-compliant
– High-throughput 132-Mbyte/s peak transfer
– Supports up to five external PCI masters
– Programmable interval timer (PIT)
– Real-time clock (RTC) with battery backup
capability and 114 bytes of RAM
– Integrated write-posting and read-buffering for
high-throughput applications
■ Additional integrated peripherals
– Three general-purpose 16-bit timers provide
flexible cascading for 32-bit operation
■ Synchronous DRAM (SDRAM) controller
– Supports 16-, 64-, 128-, and 256-Mbit SDRAM
– Supports 4 banks for a total of 256 Mbytes
– Error Correction Code provides system reliability
– Buffers improve read and write performance
– Watchdog timer guards against runaway software
– Software timer
– Synchronous serial interface (SSI) offers
full-duplex or half-duplex operation
■ AMDebug™ technology offers a low-cost
solution for the advanced debugging
– Flexible address decoding for programmable
memory and I/O mapping and system addressing
configuration
capabilities required by embedded designers
– Allows instruction tracing during execution from
the Am5x86 CPU’s internal cache
■ 32 programmable input/output (PIO) pins
■ Native support for pSOS, QNX, RTXC, VxWorks,
and Windows® CE operating systems
– Uses an enhanced JTAG port for low-cost debugging
– Parallel debug port for high-speed data exchange
during in-circuit emulation
■ Industry-standard BIOS support
■ Plastic Ball Grid Array (PBGA388) package
■ General-Purpose (GP) bus with programmable
timing for 8- and 16-bit devices provides good
performance at low cost
GENERAL DESCRIPTION
The Élan™SC520 microcontroller is a full-featured mi-
crocontroller developed for the general embedded
market. The ÉlanSC520 microcontroller combines a
32-bit, low-voltage Am5x86 CPU with a set of inte-
grated peripherals suitable for both real-time and PC/
AT-compatible embedded applications.
Designed for medium- to high-performance applications
in the telecommunications, data communications, and
information appliance markets, the ÉlanSC520 micro-
controller is particularly well suited for applications re-
quiring high throughput combined with low latency. The
compact Plastic Ball Grid Array (PBGA) package pro-
vides a high degree of functionality in a very small form
factor, making it cost-effective for many applications. A
0.25-micron CMOS manufacturing process allows for
low power consumption along with high performance.
An integrated PCI host bridge, SDRAM controller, enhanced
PC/AT-compatible peripherals, and advanced debugging
features provide the system designer with a wide range of
on-chip resources, allowing support for legacy devices as
well as new devices available in the current PC marketplace.
Final Draft# 22003
Rev: B Amendment/0
© Copyright 2001 Advanced Micro Devices, Inc. All rights reserved.
Issue Date: March 2001