3.4.4 Inspection. The inspection requirements of MIL-PRF-55310 apply to all devices delivered to
this document. Inspection conditions and standards are documented in accordance with the
Quality Assurance, ISO-9001 derived system of QSP-90100.
3.4.5 Test. The Screening test matrix of Table 4 is tailored for selectable-combination testing to
eliminate costs associated with the development/maintenance of device-specific documentation
packages while maintaining performance integrity.
3.4.6 Marking. Device marking shall be in accordance with the requirements of MIL-PRF-55310.
3.4.7 Ruggedized COTS Design Implementation. Design Pedigree “D” devices (see ¶ 5.2) use the
same robust designs as the other device pedigrees. They do not include the provisions of
traceability or the Class-qualified componentry noted in paragraphs 3.4.3 and 4.1.
4.
DETAIL REQUIREMENTS
Components
4.1
4.1.1 Crystals. Cultured quartz crystal resonators are used to provide the selected frequency for the
devices. Premium Q swept quartz is standard for all Class S level products because of its
superior radiation tolerance. For Class B level products, swept quartz is optional, as required
by the customer. In accordance with MIL-PRF-55310, the manufacturer has a documented
crystal evaluation program.
4.1.2 Passive Components. Passive components will have the same pedigree as the die specified in
paragraph 7.1. Where possible, for Design Pedigrees ‘E’ & ‘R’, Established Reliability (ER)
failure level R and S passive components are employed. Otherwise, all components comply
with the Element Evaluation requirements of MIL-PRF-38534 or Enhanced Element
Evaluation as specified in Appendix A herein. When used, inductors may be open construction
and may use up to 47 gauge wire.
4.1.3 Class S Microcircuits. Microcircuits are procured from wafer lots that have passed MIL-PRF-
38534 Class K Lot Acceptance Tests for Class S devices. Although radiation testing is not
performed at the oscillator level, Design Pedigree Codes E and R versions of this TCXO are
acceptable for use in environments of up to 100krad (Si) total dose as a result of wafer lot
specific RLAT or by analysis of the individual components. Sinewave devices are assembled
with all bipolar semiconductors.
ACMOS devices are assembled with all bipolar
semiconductors with the exception of the ACMOS chip used to provide the CMOS output. An
ACMOS die from a radiation tested and certified wafer lot will be provided for all Class S
versions of this TCXO. This microcircuit is certified for 100krads (Si) total ionizing dose
(TID), RHA level R (2X minimum margin). NSC, as the 54ACT designer, rates the SET LET
at > 40MeV and SEL at >120MeV for the FACT™ family (AN-932). Vectron has conducted
additional SEE testing in 2008 to verify this performance since our lot wafer testing does not
include these parameters and determinations.
A copy of the parts list and materials can be provided for customer review upon request.
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
F
A
00136
N/A
DOC200103
4
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