21154 PCI-to-PCI Bridge
17.4.2 PCI Signal Timing Specifications .........................................................152
17.4.3 Reset Timing Specifications.................................................................154
17.4.4 gpio Timing Specifications....................................................................154
17.4.5 JTAG Timing Specifications .................................................................155
18.0
Mechanical Specifications..............................................................................................157
Figures
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21154 on the System Board..................................................................................2
21154 with Option Cards.......................................................................................3
21154 Block Diagram............................................................................................4
21154 Downstream Data Path ..............................................................................5
21154 PBGA Cavity Down View .........................................................................19
Flow-Through Posted Memory Write Transaction...............................................35
Downstream Delayed Write Transaction.............................................................37
Fast Back-to-Back Transactions on the Target Bus............................................39
Nonprefetchable Delayed Read Transaction ......................................................43
Prefetchable Delayed Read Transaction.............................................................44
Flow-Through Prefetchable Read Transaction....................................................45
Configuration Transaction Address Formats.......................................................46
Delayed Write Transaction Terminated with Master Abort..................................55
Delayed Read Transaction Terminated with Target Abort ..................................58
I/O Transaction Forwarding Using Base and Limit Addresses............................62
I/O Transaction Forwarding in ISA Mode ............................................................64
Memory Transaction Forwarding Using Base and Limit Registers .....................66
Secondary Arbiter Example.................................................................................92
Example of gpio Clock Mask Implementation on the System Board...................97
Clock Mask and Load Shift Timing......................................................................98
p_clk and s_clk Relative Timing..........................................................................99
21154 Configuration Space Map.......................................................................108
PCI Clock Signal AC Parameter Measurements...............................................151
PCI Signal Timing Measurement Conditions.....................................................152
304-Point 2-Layer PBGA Package....................................................................157
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Tables
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21154 Function Blocks..........................................................................................4
Signal Pin Functional Groups................................................................................7
Signal Type Abbreviations.....................................................................................7
Primary PCI Bus Interface Signals........................................................................8
Primary PCI Bus Interface 64-Bit Extension Signals...........................................11
Secondary PCI Bus Interface Signals .................................................................12
Secondary PCI Bus Interface 64-Bit Extension Signals......................................14
Secondary PCI Bus Arbitration Signals...............................................................15
General-Purpose I/O Interface Signals ...............................................................15
Clock Signals.......................................................................................................16
Reset Signals ......................................................................................................16
Miscellaneous Signals.........................................................................................17
JTAG Signals ......................................................................................................18
21154 PBGA Pin List...........................................................................................20
21154 PBGA Pin List...........................................................................................25
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Datasheet
vii
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