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SEMICONDUCTOR TECHNICAL DATA
Motorola Preferred Device
TMOS POWER FET
10 AMPERES
100 VOLTS
N–Channel Enhancement–Mode Silicon Gate
This advanced TMOS E–FET is designed to withstand high
energy in the avalanche and commutation modes. The new energy
efficient design also offers a drain–to–source diode with a fast
recovery time. Designed for low voltage, high speed switching
applications in power supplies, converters and PWM motor
controls, these devices are particularly well suited for bridge circuits
where diode speed and commutating safe operating areas are
critical and offer additional safety margin against unexpected
voltage transients.
R
= 0.22 OHM
DS(on)
D
•
•
Avalanche Energy Specified
Source–to–Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
G
•
•
•
Diode is Characterized for Use in Bridge Circuits
CASE 369A–13, Style 2
DPAK Surface Mount
I
and V Specified at Elevated Temperature
DSS
DS(on)
S
Surface Mount Package Available in 16 mm, 13–inch/2500
Unit Tape & Reel, Add T4 Suffix to Part Number
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
C
Rating
Symbol
Value
Unit
Drain–to–Source Voltage
V
100
Vdc
Vdc
DSS
Drain–to–Gate Voltage (R
= 1.0 MΩ)
Gate–to–Source Voltage — Continuous
V
DGR
100
GS
V
±15
±20
Vdc
Vpk
GS
Gate–to–Source Voltage — Non–Repetitive (t ≤ 10 ms)
V
GSM
p
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (t ≤ 10 µs)
I
I
10
6.0
35
Adc
Apk
D
D
I
p
DM
Total Power Dissipation @ T = 25°C
Derate above 25°C
P
D
40
0.32
1.75
Watts
W/°C
Watts
C
Total Power Dissipation @ T = 25°C, when mounted to minimum recommended pad size
A
Operating and Storage Temperature Range
T , T
J stg
–55 to 150
°C
Single Pulse Drain–to–Source Avalanche Energy — Starting T = 25°C
E
AS
mJ
J
(V
DD
= 25 Vdc, V = 5.0 Vdc, I = 10 Apk, L = 1.0 mH, R =25 Ω)
GS L G
50
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Thermal Resistance — Junction to Ambient, when mounted to minimum recommended pad size
R
θJC
R
θJA
R
θJA
3.13
100
71.4
°C/W
Maximum Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
T
L
260
°C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
Motorola TMOS Power MOSFET Transistor Device Data
Motorola, Inc. 1995
1
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