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1516B-101-501E PDF预览

1516B-101-501E

更新时间: 2023-08-15 00:00:00
品牌 Logo 应用领域
DATADELAY /
页数 文件大小 规格书
3页 274K
描述
Delay Line

1516B-101-501E 数据手册

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1516  
PASSIVE DELAY LINE TEST SPECIFICATIONS  
TEST CONDITIONS  
INPUT:  
OUTPUT:  
Ambient Temperature:  
Input Pulse:  
25oC ± 3oC  
Rload  
Cload  
:
:
10MΩ  
High = 3.0V typical  
Low = 0.0V typical  
50Max.  
10pf  
Threshold: 50% (Rising & Falling)  
Source Impedance:  
Rise/Fall Time:  
3.0 ns Max. (measured  
at 10% and 90% levels)  
Pulse Width (TD <= 75ns): PWIN = 100ns  
Period  
Pulse Width (TD > 75ns): PWIN = 2 x TD  
Period (TD > 75ns): PERIN = 10 x TD  
(TD <= 75ns): PERIN = 1000ns  
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.  
PERIN  
PWIN  
TRISE  
TFALL  
INPUT  
VIH  
90%  
50%  
90%  
50%  
10%  
SIGNAL  
VIL  
10%  
TRISE  
TFALL  
TRISE  
TFALL  
OUTPUT  
SIGNAL  
VOH  
90%  
50%  
90%  
50%  
10%  
VOL  
10%  
Timing Diagram For Testing  
IN  
RIN  
T1  
OUT  
IN  
T2  
OSCILLOSCOPE  
PULSE  
GENERATOR  
TRIG  
DEVICE UNDER T3  
TRIG  
TEST (DUT)  
T4  
T5  
50 Ω  
ROUT  
RIN = ROUT = ZLINE  
Test Setup  
Doc #97029  
1/11/2008  
DATA DELAY DEVICES, INC.  
3
3 Mt. Prospect Ave. Clifton, NJ 07013  

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