Datasheet > 1337GDCGK

1337GDCGK

更新时间： 2024-01-12 05:38:03

品牌	Logo	应用领域
艾迪悌 - IDT		时钟光电二极管外围集成电路
页数	文件大小	规格书
28页	278K
描述
Real Time Clock, 1 Timer(s), PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8

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1337GDCGK 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	0.150 INCH, ROHS COMPLIANT, SOIC-8	针数：	8
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.65
最大时钟频率：	0.4 MHz	信息访问方法：	I2C
中断能力：	Y	JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e3	长度：	4.9 mm
湿度敏感等级：	1	位数：	8
端子数量：	8	计时器数量：	1
最高工作温度：	105 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP8,.25	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	峰值回流温度（摄氏度）：	260
电源：	2/5 V	认证状态：	Not Qualified
座面最大高度：	1.75 mm	子类别：	Timer or RTC
最大供电电压：	5.5 V	最小供电电压：	1.8 V
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn) - annealed	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
最短时间：	SECONDS	处于峰值回流温度下的最长时间：	30
宽度：	3.9 mm	uPs/uCs/外围集成电路类型：	TIMER, REAL TIME CLOCK
Base Number Matches：	1

1337GDCGK 数据手册

IDT1337G

REA LTIME CLOCK WITH SERIAL INTERFACE

RTC

Clock and Calendar

Alarms

The time and calendar information is obtained by reading

the appropriate register bytes. The RTC registers are

illustrated in Table 1. The time and calendar are set or

initialized by writing the appropriate register bytes. The

contents of the time and calendar registers are in the

binary-coded decimal (BCD) format.

The IDT1337G contains two time of day/date alarms. Alarm

1 can be set by writing to registers 07h to 0Ah. Alarm 2 can

be set by writing to registers 0Bh to 0Dh. The alarms can be

programmed (by the INTCN bits of the Control Register) to

operate in two different modes—each alarm can drive its

own separate interrupt output or both alarms can drive a

common interrupt output. Bit 7 of each of the

The day-of-week register increments at midnight. Values

that correspond to the day of week are user-defined but

must be sequential (i.e., if 1 equals Sunday, then 2 equals

Monday, and so on). Illogical time and date entries result in

undefined operation.

time-of-day/date alarm registers are mask bits (Table 1).

When all of the mask bits for each alarm are logic 0, an

alarm only occurs when the values in the timekeeping

registers 00h–06h match the values stored in the

time-of-day/date alarm registers. The alarms can also be

programmed to repeat every second, minute, hour, day, or

date. Table 2 (Alarm Mask Bits table) shows the possible

settings. Configurations not listed in the table result in

illogical operation

When reading or writing the time and date registers,

secondary (user) buffers are used to prevent errors when

the internal registers update. When reading the time and

date registers, the user buffers are synchronized to the

internal registers on any start or stop and when the register

pointer rolls over to zero.

The DY/DT bits (bit 6 of the alarm day/date registers) control

whether the alarm value stored in bits 0 to 5 of that register

reflects the day of the week or the date of the month. If

DY/DT is written to a logic 0, the alarm is the result of a

match with date of the month. If DY/DT is written to a logic

1, the alarm is the result of a match with day of the week.

The countdown chain is reset whenever the seconds

pulse from the device. To avoid rollover issues, once the

countdown chain is reset, the remaining time and date

registers must be written within 1 second. The 1Hz

square-wave output, if enable, transitions high 500ms after

the seconds data transfer, provided the oscillator is already

running.

When the RTC register values match alarm register

settings, the corresponding Alarm Flag (‘A1F’ or ‘A2F’) bit is

set to logic 1. If the corresponding Alarm Interrupt Enable

(‘A1IE’ or ‘A2IE’) is also set to logic 1, the alarm condition

activates one of the interrupt output (INTA or SQW/INTB)

signals. The match is tested on the once-per-second update

of the time and date registers.

The IDT1337G can be run in either 12-hour or 24-hour

mode. Bit 6 of the hours register is defined as the 12- or

24-hour mode-select bit. When high, the 12-hour mode is

selected. In the 12-hour mode, bit 5 is the AM/PM bit with

logic high being PM. In the 24-hour mode, bit 5 is the second

10-hour bit (20–23 hours). All hours values, including the

alarms, must be reinitialized whenever the 12/24-hour mode

bit is changed. The century bit (bit 7 of the month register)

is toggled when the years register overflows from 99–00.

IDT® REAL-TIME CLOCK WITH I C SERIAL INTERFACE

IDT1337G

REV L 062613

1...4 5 678 9 10...28

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