Datasheet > 10M08DAU324I6

10M08DAU324I6

更新时间： 2023-01-02 22:19:37

品牌	Logo	应用领域
英特尔 - INTEL		栅
页数	文件大小	规格书
14页	604K
描述
Field Programmable Gate Array, PBGA324, 15 X 15 MM, 0.80 MM PITCH, UBGA-324

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10M08DAU324I6 数据手册

M10-OVERVIEW

2014.09.22

Summary of MAX 10 Device Features

Advantage

Supporting Feature

High productivity design tools

•

Quartus^®II web edition

Qsys system integration tool

DSP Builder

Nios^®II Embedded Design Suite (EDS)

Summary of MAX 10 Device Features

Table 2: Summary of Features for MAX 10 Devices

Feature

Description

Technology

Packaging

55 nm TSMC Embedded Flash (EmbFlash) process technology

•

Low cost and small package sizes

Multiple device densities with compatible package footprints

for seamless migration between different device densities

RoHS6-compliant

•

Core architecture

4-input look-up table (LUT) and single register logic element

(LE)

•

LEs arranged in logic array block (LAB)

Embedded RAM and user flash memory

Clocks and PLLs

Embedded multiplier blocks

General purpose I/Os

Internal memory blocks

User Flash Memory

•

M9K—9 kilobits (Kb) memory blocks

Cascadable blocks to create RAM, dual port, and FIFO

functions

•

User accessible non-volatile storage

High speed operating frequency

Large memory size

High data retention

Multiple interface option

MAX 10 FPGA Device Overview

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