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100X07N105MV4T PDF预览

100X07N105MV4T

更新时间： 2024-02-05 04:12:11
品牌 Logo 应用领域
约翰逊 - JOHANSON 电容器
页数 文件大小 规格书
6页 514K
描述
Data Line Filter, 1 Function(s), 10V, EIA STD PACKAGE SIZE 0402, 3 PIN

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100X07N105MV4T 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active包装说明：EIA STD PACKAGE SIZE 0402, 3 PIN
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8504.50.80.00风险等级：5.77
电容器类型：CERAMIC CAPACITOR介电材料：CERAMIC
JESD-609代码：e3端子数量：2
端子面层：Matte Tin (Sn) - with Nickel (Ni) barrierBase Number Matches：1

100X07N105MV4T 数据手册

 浏览型号100X07N105MV4T的Datasheet PDF文件第1页浏览型号100X07N105MV4T的Datasheet PDF文件第2页浏览型号100X07N105MV4T的Datasheet PDF文件第3页浏览型号100X07N105MV4T的Datasheet PDF文件第4页浏览型号100X07N105MV4T的Datasheet PDF文件第5页 
®
X2Y Fil t e r & De c o u p l i n g  
ca pa c i t o r s  
so l d e r  
pA d  
re c o M M e n d At i o n s  
0402 (X07)  
IN mm  
0603 (X14)  
0805 (X15)  
1206 (X18)  
1210 (X41)  
1410 (X44)  
1812 (X43)  
IN  
mm  
IN  
mm  
1.27  
0.89  
1.27  
0.56  
2.03  
3.05  
IN  
mm  
1.65  
1.02  
2.03  
1.02  
3.05  
4.06  
IN  
mm  
IN  
mm  
IN  
mm  
X
Y
G
V
0.020  
0.020  
0.024  
0.015  
0.039  
0.064  
0.51  
0.51  
0.61  
0.38  
0.99  
1.63  
0.035  
0.025  
0.040  
0.020  
0.060  
0.090  
0.89  
0.64  
1.02  
0.51  
1.52  
2.29  
0.050  
0.035  
0.050  
0.022  
0.080  
0.120  
0.065  
0.040  
0.080  
0.040  
0.120  
0.160  
0.100  
0.040  
0.080  
0.045  
0.160  
0.160  
2.54  
1.02  
2.03  
1.14  
4.06  
4.06  
0.100  
0.040  
0.100  
0.045  
0.160  
0.180  
2.54  
1.02  
2.54  
1.14  
4.06  
4.57  
0.125  
0.040  
0.130  
0.045  
0.190  
0.210  
3.18  
1.02  
3.30  
1.14  
4.83  
5.33  
U
Z
Use of solder mask beneath component is not recommended.  
Z
Z
U
U
X
X
V
V
V
V
Y
G
Y
G
Good Layout  
Poor Layout  
Figure 1  
optiMizing X2Y pe r F o r M A n c e w it h  
pr o p e r  
At tA c h M e n t  
te c h n i q u e s  
X2Y® capacitors excel in low inductance performance for a myriad of applications including EMI/RFI filtering, power supply bypass  
/ decoupling. How the capacitor is attached to the application PCB is every bit as important as the capacitor itself. Proper attention  
to pad layout and via placement insures superior device performance. Poor PCB layouts squander performance, requiring more  
capacitors, and more vias to do the same job. Figure 1 compares the X2Y® recommended layout against a poor layout. Because  
of its long extents from device terminals to vias, and the wide via separation, the poor layout shown performs badly. It exhibits  
approximately 200% L1 inductance, and 150% L2 inductance compared to recommended X2Y layouts.  
For further details on via placement and it’s effect on mounted inductance, please refer to X2Y Attenuators, LLC. application note  
“Get the Most from X2Y Capacitors with Proper Attachment Techniques” at www.x2y.com/bypass.htm  
®
X2Y technology patents and registered trademark under license from X2Y ATTENUATORS, LLC  
Johanson Dielectrics, Inc. reserves the right to make design and price changes without notice. All sales are subject to the terms  
and conditions printed on the back side of our sales order acknowledgment forms, including a limited warranty and remedies for  
non-conforming goods or defective goods. We will be pleased to provide a copy of these terms and conditions for your review.  
JOꢀANSON ꢀONG KONG LTD.  
JOꢀANSON EUROPE LTD.  
Unit E, 11/F., Phase 1, Kaiser Estate  
41 Man Yue Street  
Hunghom, Kowloon, Hong Kong  
Tel: (852) 2334 6310 • Fax: (852) 2334 8858  
Acorn House, Old Kiln Road  
Flackwell Heath, Bucks HP10 9NR  
United Kingdom  
15191 Bledsoe Street  
Sylmar, California 91342  
Tel (818) 364-9800 • FAX (818) 364-6100  
http://www.johansondielectrics.com  
Tel +44-162-853-1154 • Fax +44-162-853-2703  
© 2008 Publication X2Y0804 Printed in USA  
1...3456

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