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100371QI PDF预览

100371QI

更新时间: 2024-02-16 01:14:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 逻辑集成电路
页数 文件大小 规格书
8页 85K
描述
Multiplexer, 100K Series, 3-Func, 4 Line Input, 1 Line Output, Complementary Output, ECL, PQCC28, 0.450 X 0.450 INCH, PLASTIC, MO-047, LCC-28

100371QI 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:QCCJ, LDCC28,.5SQReach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.71
Is Samacsys:N系列:100K
JESD-30 代码:S-PQCC-J28JESD-609代码:e0
长度:11.48 mm逻辑集成电路类型:MULTIPLEXER
功能数量:3输入次数:4
输出次数:1端子数量:28
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:OPEN-EMITTER输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC28,.5SQ封装形状:SQUARE
封装形式:CHIP CARRIER电源:-4.5 V
最大电源电流(ICC):75 mAProp。Delay @ Nom-Sup:1.4 ns
传播延迟(tpd):2.4 ns认证状态:Not Qualified
座面最大高度:4.57 mm子类别:Multiplexer/Demultiplexers
表面贴装:YES技术:ECL
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD宽度:11.48 mm
Base Number Matches:1

100371QI 数据手册

 浏览型号100371QI的Datasheet PDF文件第1页浏览型号100371QI的Datasheet PDF文件第2页浏览型号100371QI的Datasheet PDF文件第3页浏览型号100371QI的Datasheet PDF文件第5页浏览型号100371QI的Datasheet PDF文件第6页浏览型号100371QI的Datasheet PDF文件第7页 
Commercial Version (Continued)  
SOIC and PLCC AC Electrical Characteristics  
V
EE = −4.2V to 5.7V, VCC = VCCA = GND  
Symbol Parameter  
Propagation Delay  
T
C = 0°C  
T
C = +25°C  
TC = +85°C  
Units  
ns  
Conditions  
Min  
Max  
Min  
Max  
Min  
Max  
tPLH  
tPHL  
tPLH  
tPHL  
tPLH  
tPHL  
tTLH  
tTHL  
tOSHL  
0.45  
0.90  
0.65  
0.35  
1.30  
2.20  
2.10  
1.10  
0.45  
1.30  
0.45  
1.40  
I0xI3x to Output  
Propagation Delay  
Figures 1, 2  
(Note 5)  
0.90  
0.65  
0.35  
2.20  
2.10  
1.10  
1.00  
0.75  
0.35  
2.40  
2.20  
1.10  
ns  
S0, S1 to Output  
Propagation Delay  
ns  
E to Output  
Transition Time  
ns  
Figures 1, 2  
20% to 80%, 80% to 20%  
Maximum Skew Common Edge  
Output-to-Output Variation  
Data to Output Path  
PLCC only  
(Note 6)  
400  
490  
490  
430  
400  
490  
490  
430  
400  
490  
490  
430  
ps  
ps  
ps  
ps  
tOSLH  
tOST  
tPS  
Maximum Skew Common Edge  
Output-to-Output Variation  
Data to Output Path  
PLCC only  
(Note 6)  
Maximum Skew Opposite Edge  
Output-to-Output Variation  
Data to Output Path  
PLCC only  
(Note 6)  
Maximum Skew  
PLCC only  
(Note 6)  
Pin (Signal) Transition Variation  
Data to Output Path  
Note 5: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.  
Note 6: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same pack-  
aged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL), or LOW-to-HIGH (tOSLH), or in opposite  
directions both HL and LH (tOST). Parameters tOST and tPS guaranteed by design.  
www.fairchildsemi.com  
4

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