100336SCX

更新时间： 2024-01-12 18:23:01

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		移位寄存器计数器
页数	文件大小	规格书
14页	152K
描述
Counter/Shift Register

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数据手册

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100336SCX 数据手册

SOIC and PLCC AC Electrical Characteristics

_EE= −4.2V to −5.7V, V_CC= V_CCA= GND

_C= 0°C

Max

_C= +25°C

T_C= +85°C

Symbol

Parameter

Units

MHz

Conditions

Figures 2, 3

Min

Max

Min

Max

f_SHIFT

t_PLH

t_PHL

t_PLH

t_PHL

t_PLH

t_PHL

t_PLH

t_PHL

t_PLH

t_PHL

Shift Frequency

350

Propagation Delay

CP to Q_n, Q_n

Figures 1, 2

(Note 6)

1.00

2.10

2.40

1.40

2.80

2.40

1.80

1.90

0.35

1.80

3.30

4.20

2.30

4.90

3.80

2.90

3.90

1.10

1.00

2.10

2.40

1.40

2.90

2.40

1.80

1.90

0.35

1.80

3.30

4.20

2.30

5.00

3.80

2.90

3.90

1.10

1.00

2.10

2.60

1.50

3.10

2.50

1.90

2.10

0.35

1.80

3.50

4.50

2.40

5.30

3.90

3.10

4.20

1.10

Propagation Delay

CP to TC (Shift)

Propagation Delay

CP to TC (Count)

Propagation Delay

MR to Q_n, Q_n

Figures 1, 7, 8

(Note 6)

Figures 1, 9

(Note 6)

Figures 1, 4

(Note 6)

Propagation Delay

MR to TC (Count)

Propagation Delay

MR to TC (Shift)

Propagation Delay

D₀/CET to TC

Figures 1, 12

(Note 6)

Figures 1, 10, 11

(Note 6)

t_PLH

t_PHL

t_PLH

t_PHL

t_TLH

t_THL

t_S

Figures 1, 5

(Note 6)

Propagation Delay

S_nto TC

Transition Time

20% to 80%, 80% to 20%

Setup Time

Figures 1, 3

D₃

0.90

1.40

1.20

1.30

3.30

2.50

0.90

1.40

1.20

1.30

3.30

2.50

0.90

1.40

1.20

1.30

3.30

2.50

P_n

D₀/CET

Figures 4, 6

CEP

S_n

MR (Release Time)

Hold Time

t_H

D₃

0.30

0.20

0.10

0.00

0.30

0.20

0.10

0.00

0.30

0.20

0.10

0.00

P_n

Figure 6

D₀/CET

CEP

S_n

t_PW(H)

Pulse Width HIGH

CP, MR

2.00

Figures 3, 4

t_OSHL

Maximum Skew Common Edge

Output-to-Output Variation

Clock to Output Path

Maximum Skew Common Edge

Output-to-Output Variation

Clock to Output Path

Maximum Skew Opposite Edge

Output-to-Output Variation

Clock to Output Path

Maximum Skew

Pin (Signal) Transition Variation

Clock to Output Path

PLCC Only

(Note 7)

200

230

245

200

230

245

200

230

245

t_OSLH

t_OST

t_PS

PLCC Only

(Note 7)

PLCC Only

(Note 7)

PLCC Only

(Note 7)

Note 6: The propagation delay specified is for single output switching. Delays may vary up to 250 ps with multiple outputs switching.

Note 7: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same pack-

aged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (t_OSHL), or LOW-to-HIGH (t_OSLH), or in opposite

directions both HL and LH (t_OST). Parameters t_OSTand t_psguaranteed by design

www.fairchildsemi.com

1...3 4 567 8 9...14

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