Datasheet > ZR36057

ZR36057

更新时间： 2024-02-16 16:29:34

品牌	Logo	应用领域
卓然 - ZORAN		控制器 PC
页数	文件大小	规格书
48页	620K
描述
ENHANCED PCI BUS MULTIMEDIA CONTROLLER

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数据手册

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ZR36057 数据手册

Enhanced PCI Bus Multimedia Controller

Appendix A: ZR36100 - ZR36057 Interface

Figure 15 describes a recommended interconnection between

the ZR36057 and the ZR36100/ZR36110 host bus.

ZR36100 Initialization

The initialization consists of loading the ZR36100 microcodes

and parameters. This is done using the PostOffice mechanism.

The host interface of the ZR36100 must be set to 8 bit, Intel

format, I/O only. The BSLN parameter should be set to 2 or 4, for

efficient operation.

Other Guests

ZR36100/110

DREQ

ZR36057

DACK

BUSCS

GCSn

On-Line Commands and Status

BUSWR

GWR

BUSRD

GRD

On-line command writes and status reads are also done using

the PostOffice mechanism.

BUSADD[1:0]

BUSDAT[7:0]

READY

GADR[2:0]

GDAT[7:0]

GRDY

(Optional)

IDLE

GIRQ0

GPIO0

GIRQ1

Bitstream Transfer

RESET

VSYNC

Some preparations must be done prior to triggering the

ZR36100 with a go command.

The host must allocate a contiguous code buffer in the system

memory. Bitstream retrieved from the MPEG source is stored in

this buffer. The ZR36057 reads data from this buffer in a DMA

fashion and transfers it, through the CFIFO, to the MPEG

decoder. There are several possible sizes of the memory buffer.

The host must inform the ZR36057 of the buffer address, size

and “report step”. After the code buffer in memory is allocated,

reported to the ZR36057, and filled up for the first time, a

ZR36100 go command can be issued. Immediately after this, the

DMA code-read cycles must be enabled by setting the DMA

Code-Read Enable bit to ‘1’. The ZR36057 then starts fetching

data from the main memory buffer using cyclic addressing.

Whenever it passes a “report step” it initializes an interrupt

request. Within the interrupt service routine the host should

check the current position of the ZR36057 Code Memory Buffer

Pointer, and decide weather it should refresh an old portion of

the buffer with new data from the MPEG source. Once the coded

data arrives at the CFIFO, the GBM unit starts writing it over the

GuestBus to the ZR36100.

Figure 15. ZR36057 - ZR36100/110 Basic Interconnection

ZR36100 Reset

Any of the software controlled GPI/O pins (configured as output)

of the ZR36057 may be used as a RESET input of the decoder.

The software then directly manipulates the RESET signal

through the corresponding register bit. Since the default config-

uration of the GPIO pins after reset is input, a pull down resistor

should be applied to the ZR36100 RESET input.

Mapping the ZR36100 on the ZR36057’s GuestBus

The driver software must map the ZR36100 on the GuestBus:

the ZR36100’s guest ID number (0,1,2, or 3) must be configured

as a code-write target. The proper timing parameters (tdur = 3,

to ensure 82ns, trec = 4, to ensure 100ns) of the ZR36100 must

be loaded to the GuestBus control register (address 0x030). The

ZR36100 occupies only four 8-bit registers out of the eight reg-

isters dedicated to each guest.

1...41 42 434445 46 47 48

中文翻译

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与ZR36057相关器件

型号	品牌	获取价格	描述	数据表
ZR36057PQC	ZORAN	获取价格	ENHANCED PCI BUS MULTIMEDIA CONTROLLER
ZR36060	ETC	获取价格	Integrated JPEG CODEC
ZR36060PQC	ETC	获取价格	Integrated JPEG CODEC
ZR36060PQC-27	ETC	获取价格
ZR36060PQC-29.5	ETC	获取价格
ZR36067	ETC	获取价格	AV PCI CONTROLLER
ZR36067PQC	ETC	获取价格	AV PCI CONTROLLER
ZR36067PQC-LV	ETC	获取价格	Peripheral IC
ZR36100PQC	ETC	获取价格	Audio/Video Decoder for MPEG
ZR36110PQC	ETC	获取价格	Audio/Video Decoder for MPEG

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