Z0103MA0
NXP Semiconductors
4Q Triac
2. Pinning information
Table 2.
Pinning information
Symbol Description
Pin
1
Simplified outline
Graphic symbol
T2
G
main terminal 2
gate
T2
T1
G
2
3
T1
main terminal 1
sym051
3 2 1
SOT54 (TO-92)
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
plastic single-ended leaded (through hole) package; 3 leads
Version
Z0103MA0
TO-92
SOT54
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDRM
Parameter
Conditions
Min
Max
600
1
Unit
V
repetitive peak off-state voltage
RMS on-state current
-
-
IT(RMS)
full sine wave; Tlead ≤ 38 °C; see Figure 3;
A
see Figure 1; see Figure 2
ITSM
non-repetitive peak on-state
current
full sine wave; Tj(init) = 25 °C; tp = 20 ms;
see Figure 4; see Figure 5
-
12.5
A
full sine wave; Tj(init) = 25 °C; tp = 16.7 ms
tp = 10 ms; sine-wave pulse
-
-
-
13.8
0.78
50
A
A2s
I2t
I2t for fusing
dIT/dt
rate of rise of on-state current
IT = 1 A; IG = 20 mA; dIG/dt = 100 mA/µs;
T2+ G+
A/µs
IT = 1 A; IG = 20 mA; dIG/dt = 100 mA/µs;
T2+ G-
-
-
-
50
50
20
A/µs
A/µs
A/µs
IT = 1 A; IG = 20 mA; dIG/dt = 100 mA/µs;
T2- G-
IT = 1 A; IG = 20 mA; dIG/dt = 100 mA/µs;
T2- G+
IGM
peak gate current
peak gate power
-
1
A
PGM
PG(AV)
Tstg
Tj
-
2
W
W
°C
°C
average gate power
storage temperature
junction temperature
over any 20 ms period
-
0.1
150
125
-40
-
Z0103MA0
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 01 — 3 January 2011
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