Datasheet > XA9572XL-10TQG100I

XA9572XL-10TQG100I

更新时间： 2024-01-07 04:14:21

品牌	Logo	应用领域
赛灵思 - XILINX		输入元件可编程逻辑
页数	文件大小	规格书
4页	61K
描述
Flash PLD, 10ns, 72-Cell, CMOS, PQFP100, TQFP-100

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XA9572XL-10TQG100I 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFP
包装说明：	LFQFP, QFP100,.63SQ,20	针数：	100
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.55
其他特性：	YES	系统内可编程：	YES
JESD-30 代码：	S-PQFP-G100	JESD-609代码：	e3
JTAG BST：	YES	长度：	14 mm
湿度敏感等级：	3	专用输入次数：
I/O 线路数量：	72	宏单元数：	72
端子数量：	100	最高工作温度：	85 °C
最低工作温度：	-40 °C	组织：	0 DEDICATED INPUTS, 72 I/O
输出函数：	MACROCELL	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFQFP	封装等效代码：	QFP100,.63SQ,20
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：	260	电源：	2.5/3.3,3.3 V
可编程逻辑类型：	FLASH PLD	传播延迟：	10 ns
认证状态：	Not Qualified	筛选级别：	AEC-Q100
座面最大高度：	1.6 mm	子类别：	Programmable Logic Devices
最大供电电压：	3.6 V	最小供电电压：	3 V
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn)	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	30	宽度：	14 mm
Base Number Matches：	1

XA9572XL-10TQG100I 数据手册

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XA9500XL High-Performance

CPLD Automotive XA Product

Family

DS108-1 (v1.5) September 29, 2005

Preliminary Product Specification

data sheet (DS056) for pin tables

Features

•

Xilinx received TS 16949 Certification in March 2005.

•

AEC-Q100 device qualification and full PPAP support

available in both extended temperature Q-grade and

I-grade.

Description

The XA9500XL 3.3V CPLD Automotive XA product family is

targeted for leading-edge, high-performance automotive

applications that require either automotive industrial (–40°C

to +85°C ambient) or extended (–40°C to +125°C ambient)

temperature reconfigurable devices.

•

Guaranteed to meet full electrical specifications over

T_A= –40°C to +125°C (Q-grade)

•

System frequency up to 100 MHz (10 ns)

Available in small footprint packages

Optimized for high-performance 3.3V systems

5V tolerant I/O pins accept 5V, 3.3V, and 2.5V

signals — ideal for multi-voltage system interfacing

and level shifting

Power Estimation

Power dissipation in CPLDs can vary substantially depend-

ing on the system frequency, design application and output

loading. To help reduce power dissipation, each macrocell

in the XA9500XL device can be configured for low-power

mode (from the default high-performance mode). In addi-

tion, unused product-terms and macrocells are automati-

cally deactivated by the software to further conserve power.

Technology: 0.35µm CMOS process

•

Advanced system features

In-system programmable enabling higher system

reliability through reduced handling and reducing

production programming times

Superior pin-locking and routability with

FastCONNECT™ II switch matrix allowing for

multiple design iterations without board re-spins

Input hysteresis on all user and boundary-scan pin

inputs to reduce noise on input signals

Bus-hold circuitry on all user pin inputs which

reduces cost associated with pull-up resistors and

reduces bus loading

For a general estimate of I_CC, the following equation may be

used:

I_CC(mA) = MC_HP(0.5) + MC_LP(0.3) + MC(0.0045 mA/MHz) f

where:

MC_HP= Macrocells in high-performance (default)

mode

Full IEEE Standard 1149.1 boundary-scan (JTAG)

for in-system device testing

MC_LP= Macrocells in low-power mode

MC = Total number of macrocells used

f = Clock frequency (MHz)

Fast concurrent programming

•

Slew rate control on individual outputs for reducing EMI

generation

This calculation is based on typical operating conditions

using a pattern of 16-bit up/down counters in each Function

Block with no output loading. The actual I_CCvalue varies

with the design application and should be verified during

normal system operation.

Refer to XC9500XL Family data sheet (DS054) for

architecture description

Refer to XC9536XL data sheet (DS058), the

XC9572XL data sheet (DS057), and the XC95144XL

Table 1: XA9500XL Device Family

Device Temperature Grade

XA9536XL

Macrocells

Usable Gates

800

Registers

_SYSTEM(MHz)

I, Q

100

XA9572XL

1,600

XA95144XL

144

3,200

144

All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.

DS108-1 (v1.5) September 29, 2005

www.xilinx.com

Preliminary Product Specification

12 3 4

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与XA9572XL-10TQG100I相关器件

型号	品牌	描述	获取价格	数据表
XA9572XL-10TQG100Q	XILINX	Flash PLD, 10ns, 72-Cell, CMOS, PQFP100, TQFP-100	获取价格
XA9572XL-10VQG44Q	XILINX	Flash PLD, 10ns, 72-Cell, CMOS, PQFP44, VQFP-44	获取价格
XA9572XL-10VQG64I	XILINX	Flash PLD, 10ns, 72-Cell, CMOS, PQFP64, VQFP-64	获取价格
XA9572XL-15TQG100I	XILINX	Flash PLD, 15.5ns, CMOS, PQFP100, TQFP-100	获取价格
XA9572XL-15TQG100Q	XILINX	Flash PLD, 15.5ns, CMOS, PQFP100, TQFP-100	获取价格
XA9572XL-15VQG44I	XILINX	Flash PLD, 15.5ns, CMOS, PQFP44, VQFP-44	获取价格

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