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X4163V8IZ

更新时间： 2024-02-24 11:21:53
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管
页数 文件大小 规格书
22页 342K
描述
1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, ROHS COMPLIANT, PLASTIC, MO-153AC, TSSOP-8

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X4163V8IZ 技术参数

是否Rohs认证：符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：ROHS COMPLIANT, PLASTIC, MO-153AC, TSSOP-8
针数：8Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.69Is Samacsys：N
其他特性：RESET THRESHOLD VOLTAGE IS 4.38V可调阈值：NO
模拟集成电路 - 其他类型：POWER SUPPLY MANAGEMENT CIRCUITJESD-30 代码：R-PDSO-G8
JESD-609代码：e3长度：4.4 mm
湿度敏感等级：3信道数量：1
功能数量：1端子数量：8
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：MATTE TIN
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：40
宽度：3 mmBase Number Matches：1

X4163V8IZ 数据手册

 浏览型号X4163V8IZ的Datasheet PDF文件第2页浏览型号X4163V8IZ的Datasheet PDF文件第3页浏览型号X4163V8IZ的Datasheet PDF文件第4页浏览型号X4163V8IZ的Datasheet PDF文件第6页浏览型号X4163V8IZ的Datasheet PDF文件第7页浏览型号X4163V8IZ的Datasheet PDF文件第8页 
X4163, X4165  
PRINCIPLES OF OPERATION  
Power On Reset  
WATCHDOG TIMER  
The Watchdog Timer circuit monitors the microprocessor  
activity by monitoring the SDA and SCL pins. The  
microprocessor must periodically send a start bit followed by  
a stop bit prior to the expiration of the watchdog time out  
period to prevent a RESET/RESET signal. The start and  
stop bits need to be separated by SCL toggling low then high  
at least one time.  
Application of power to the X4163, X4165 activates a  
Power On Reset Circuit that pulls the RESET/RESET  
pin active. This signal provides several benefits.  
It prevents the system microprocessor from starting to  
operate with insufficient voltage.  
The state of two nonvolatile control bits in the Status  
Register determine the watchdog timer period. The  
microprocessor can change these watchdog bits, or they  
may be “locked” by tying the WP pin HIGH.  
It prevents the processor from operating prior to stabilization  
of the oscillator.  
It allows time for an FPGA to download its configuration prior  
to initialization of the circuit.  
EEPROM INADVERTENT WRITE PROTECTION  
It prevents communication to the EEPROM, greatly reducing  
the likelihood of data corruption on power up.  
When RESET/RESET goes active as a result of a low  
voltage condition or Watchdog Timer Time Out, any in-  
progress communications are terminated. While  
RESET/RESET is active, no new communications are  
allowed and no nonvolatile write operation can start.  
Nonvolatile writes in-progress when RESET/RESET  
goes active are allowed to finish.  
When VCC exceeds the device VTRIP threshold value for  
200ms (nominal) the circuit releases RESET/RESET allowing  
the system to begin operation.  
LOW VOLTAGE MONITORING  
During operation, the X4163, X4165 monitors the VCC level  
and asserts RESET/RESET if supply voltage falls below a  
preset minimum VTRIP. The RESET/RESET signal prevents  
the microprocessor from operating in a power fail or  
brownout condition. The RESET/RESET signal remains  
active until the voltage drops below 1V. It also remains active  
until VCC returns and exceeds VTRIP for 200ms.  
Additional protection mechanisms are provided with  
memory Block Lock and the Write Protect (WP) pin.  
These are discussed elsewhere in this document.  
V
THRESHOLD RESET PROCEDURE  
CC  
The X4163, X4165 is shipped with a standard V  
CC  
threshold (V  
) voltage. This value will not change  
TRIP  
over normal operating and storage conditions. How-  
ever, in applications where the standard V is not  
TRIP  
exactly right, or if higher precision is needed in the  
value, the X4163, X4165 threshold may be  
V
TRIP  
adjusted. The procedure is described below, and uses  
the application of a nonvolatile control signal.  
Figure 1. Set V  
Level Sequence (V = desired V values WEL bit set)  
TRIP  
TRIP  
CC  
VP = 12-15V  
WP  
0 1 2 3 4 5 6 7  
0 1 2 3 4 5 6 7  
0 1 2 3 4 5 6 7  
0 1 2 3 4 5 6 7  
SCL  
SDA  
A0h  
00h  
01h  
00h  
FN8120.2  
November 26, 2007  
5
12345678...22

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与X4163V8IZ相关器件

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X4163V8IZ-2.7 INTERSIL

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 		CPU Supervisor with 16K EEPROM
X4163V8IZ-2.7 RENESAS

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 		1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, ROHS COMPLIANT, PLASTIC, MO-153AC, TSSOP-8
X4163V8IZ-2.7A INTERSIL

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 		CPU Supervisor with 16K EEPROM
X4163V8IZ-2.7A RENESAS

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 		1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, ROHS COMPLIANT, PLASTIC, MO-153AC, TSSOP-8
X4163V8IZ-4.5A INTERSIL

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 		CPU Supervisor with 16K EEPROM
X4163V8Z RENESAS

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 		1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, ROHS COMPLIANT, PLASTIC, MO-153AC, TSSOP-8
X4163V8Z-2.7 INTERSIL

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 		CPU Supervisor with 16K EEPROM
X4163V8Z-2.7A RENESAS

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 		1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, ROHS COMPLIANT, PLASTIC, MO-153AC, TSSOP-8
X4163V8Z-2.7A INTERSIL

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 		CPU Supervisor with 16K EEPROM
X4163V8Z-4.5A INTERSIL

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 		CPU Supervisor with 16K EEPROM

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