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X1243S8I

更新时间： 2024-02-08 16:35:19

品牌	Logo	应用领域
XICOR		计时器或实时时钟微控制器和处理器外围集成电路光电二极管闹钟可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
18页	94K
描述
Real Time Clock/Calendar/Alarm with EEPROM

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技术参数
数据手册

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X1243S8I 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	PLASTIC, SOIC-8	针数：	8
Reach Compliance Code：	not_compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.81
最大时钟频率：	0.032 MHz	信息访问方法：	I2C
中断能力：	Y	JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e0	长度：	4.9 mm
湿度敏感等级：	1	端子数量：	8
计时器数量：	1	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装等效代码：	SOP8,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	3/5 V
认证状态：	Not Qualified	座面最大高度：	1.75 mm
子类别：	Timer or RTC	最大供电电压：	5.5 V
最小供电电压：	2.7 V	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	TIN LEAD
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	最短时间：	SECONDS
处于峰值回流温度下的最长时间：	NOT SPECIFIED	易失性：	YES
宽度：	3.9 mm	uPs/uCs/外围集成电路类型：	TIMER, REAL TIME CLOCK
Base Number Matches：	1

X1243S8I 数据手册

X1243

value to a specific day of the week is arbitrary and may

be decided by the system software designer. The Clock

Default values define 0=Sunday.

AL1, AL0: Alarm bits—Volatile

These bits announce if either alarm 1 or alarm 2 match

the real time clock. If there is a match, the respective bit

is set to ‘1’. The falling edge of the last data bit in a SR

Read operation resets the flags. Note: Only the AL bits

that are set when an SR read starts will be reset. An

alarm bit that is set by an alarm occuring during an SR

read operation will remain set after the read operation

is complete.

Clock/Calendar Registers (YR, MO, DT, HR, MN, SC)

These registers depict BCD representations of the time.

As such, SC (Seconds) and MN (Minutes) range from

00 to 59, HR (Hour) is 1 to 12 with an AM or PM indica-

tor (H21 bit) or 0 to 23 (with T24=1), DT (Date) is 1 to

31, MO (Month) is 1 to 12, YR (year) is 0 to 99.

RWEL: Register Write Enable Latch—Volatile

24 Hour Time

This bit is a volatile latch that powers up in the LOW

(disabled) state. The RWEL bit must be set to “1” prior

to any writes to the Clock/Control Registers. Writes to

RWEL bit do not cause a nonvolatile write cycle, so the

device is ready for the next operation immediately after

the stop condition. A write to the CCR requires both the

RWEL and WEL bits to be set in a specific sequence.

If the T24 bit of the HR register is 1, the RTC will use a

24-hour format. If the T24 bit is 0, the RTC will use 12-

hour format and bit H21 will function as an AM/PM indi-

cator with a ‘1’ representing PM. The clock defaults to

Standard Time with H21=0.

Leap Years

Leap years add the day February 29 and are defined as

those years that are divisible by 4. Years divisible by

100 are not leap years, unless they are also divisible by

400. This means that the year 2000 is a leap year, the

year 2100 is not. The X1243 does not correct for the

leap year in the year 2100.

WEL: Write Enable Latch—Volatile

The WEL bit controls the access to the CCR and mem-

ory array during a write operation. This bit is a volatile

latch that powers up in the LOW (disabled) state. While

the WEL bit is LOW, writes to the CCR or any array

address will be ignored (no acknowledge will be issued

after the Data Byte). The WEL bit is set by writing a “1”

to the WEL bit and zeroes to the other bits of the Status

to 0 (by writing a “0” to the WEL bit and zeroes to the

other bits of the Status Register) or until the part pow-

ers up again. Writes to WEL bit do not cause a non-vol-

atile write cycle, so the device is ready for the next

operation immediately after the stop condition.

STATUS REGISTER (SR)

The Status Register is located in the RTC area at

address 003FH. This is a volatile register only and is

used to control the WEL and RWEL write enable

latches, read an optional Low Voltage Sense bit, and

read the two alarm bits. This register is logically seper-

ated from both the array and the Clock/Control Regis-

ters (CCR).

RTCF: Real Time Clock Fail Bit—Volatile

Table 2. Status Register (SR)

This bit is set to a ‘1’ after a total power failure. This is a

read only bit that is set by hardware when the device

powers up after having lost all power to the device. The

Addr

003Fh BAT AL1 AL0

Default

RWEL WEL RTCF

bit is set regardless of whether V or V

is applied

BACK

first. The loss of one or the other supplies does not

result in setting the RTCF bit. The first valid write to the

RTC (writing one byte is sufficient) resets the RTCF bit

to ‘0’.

BAT: Battery Supply—Volatile

This bit set to “1” indicates that the device is operating

from V , not V . It is a read only bit and is set/

BACK

Unused Bits:

reset by hardware.

These devices do not use bits 3 or 4, but must have a

zero in these bit positions. The Data Byte output during

a SR read will contain zeros in these bit locations.

1 2 3 456 7 8...18

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与X1243S8I相关器件

型号	品牌	描述	获取价格	数据表
X1243S8IT1	XICOR	Real Time Clock, 0 Timer(s), CMOS, PDSO8, PLASTIC, SOIC-8	获取价格
X1243S8T1	XICOR	Real Time Clock, 0 Timer(s), CMOS, PDSO8, PLASTIC, SOIC-8	获取价格
X1243V8	XICOR	Real Time Clock/Calendar/Alarm with EEPROM	获取价格
X1243V8	INTERSIL	Real Time Clock/Calendar/Alarm with EEPROM	获取价格
X124K	ETC	CRYSTAL OSCILLATOR 8.192000MHZ	获取价格
X124LE0	SENSORTECHNICS	8 mm switching soleniod valves	获取价格

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