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X1243S8

更新时间： 2024-01-22 07:06:08
品牌 Logo 应用领域
XICOR 闹钟可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
18页 94K
描述
Real Time Clock/Calendar/Alarm with EEPROM

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X1243S8 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：PLASTIC, SOIC-8针数：8
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.81
最大时钟频率：0.032 MHz信息访问方法：I2C
中断能力：YJESD-30 代码：R-PDSO-G8
JESD-609代码：e0长度：4.9 mm
湿度敏感等级：1端子数量：8
计时器数量：1最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP8,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3/5 V
认证状态：Not Qualified座面最大高度：1.75 mm
子类别：Timer or RTC最大供电电压：5.5 V
最小供电电压：2.7 V标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：TIN LEAD
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL最短时间：SECONDS
处于峰值回流温度下的最长时间：NOT SPECIFIED易失性：YES
宽度：3.9 mmuPs/uCs/外围集成电路类型：TIMER, REAL TIME CLOCK
Base Number Matches：1

X1243S8 数据手册

 浏览型号X1243S8的Datasheet PDF文件第1页浏览型号X1243S8的Datasheet PDF文件第3页浏览型号X1243S8的Datasheet PDF文件第4页浏览型号X1243S8的Datasheet PDF文件第5页浏览型号X1243S8的Datasheet PDF文件第6页浏览型号X1243S8的Datasheet PDF文件第7页 
X1243  
or Epson C-002RX. The crystal supplies a timebase  
for a clock/oscillator. The internal clock can be driven  
by an external signal on X1, with X2 left unconnected.  
X1243  
8 pin SOIC  
18pF  
1
2
V
V
SCL  
SDA  
X1  
X2  
IRQ  
8
7
6
5
CC  
Back  
3
4
X1  
X2  
10M  
V
SS  
220K  
43pF  
X1243  
8 pin TSSOP  
V
SCL  
SDA  
SS  
IRQ  
Back  
1
2
8
7
6
5
V
CC  
Figure 1. Recommended Crystal connection  
POWER CONTROL OPERATION  
V
X1  
X2  
3
4
The Power control circuit accepts a V  
and a V  
CC  
BACK  
input. The power control circuit will switch to V  
PIN DESCRIPTIONS  
Serial Clock (SCL)  
BACK  
when V < V  
- 0.2V. It will switch back to V  
CC  
CC  
BACK  
when V exceeds V  
.
CC  
BACK  
The SCL input is used to clock all data into and out of  
the device. The input buffer on this pin is always active  
(not gated).  
V
CC  
Internal  
Voltage  
V
BACK  
Serial Data (SDA)  
V
= V -0.2V  
BACK  
CC  
SDA is a bidirectional pin used to transfer data into  
and out of the device. It has an open drain output and  
may be wire ORed with other open drain or open col-  
lector outputs. The input buffer is always active (not  
gated).  
Figure 2. Power Control  
REAL TIME CLOCK OPERATION  
An open drain output requires the use of a pull-up  
resistor. The output circuitry controls the fall time of  
the output signal with the use of a slope controlled  
pull-down. The circuit is designed for 400kHz 2-wire  
interface speeds.  
The Real Time Clock (RTC) uses an external, 32.768KHz  
quartz crystal to maintain an accurate internal repre-  
sentation of the year, month, day, date, hour, minute,  
and seconds. The RTC has leap-year correction and a  
century byte. The clock will also correct for months hav-  
ing fewer than 31 days and will have a bit that controls  
24 hour or AM/PM format. When the X1243 powers up  
V
BACK  
This input provides a backup supply voltage to the  
device. V supplies power to the device in the  
BACK  
after the loss of both V and V  
, the clock will not  
CC  
BACK  
event the V supply fails.  
CC  
increment until at least one byte is written to the clock  
register.  
Interrupt Output— IRQ  
Reading the Real Time Clock  
This is an interrupt signal output. This signal notifies a  
host processor that alarm has occurred and requests  
action. It is an open drain active LOW output.  
The RTC is read by initiating a Read command and  
specifying the address corresponding to the register of  
the Real Time Clock. The RTC Registers can then be  
read in a Sequential Read Mode. Since the clock runs  
continuously and a read takes a finite amount of time,  
there is the possibility that the clock could change dur-  
ing the course of a read operation. In this device, the  
time is latched by the read command (falling edge of  
X1, X2  
The X1 and X2 pins are the input and output, respec-  
tively, of an inverting amplifier that can be configured  
for use as an on-chip oscillator. A 32.768kHz quartz  
crystal is used. Recommeded crystals are Sieko VT-200  
2
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