X1243
or Epson C-002RX. The crystal supplies a timebase
for a clock/oscillator. The internal clock can be driven
by an external signal on X1, with X2 left unconnected.
X1243
8 pin SOIC
18pF
1
2
V
V
SCL
SDA
X1
X2
IRQ
8
7
6
5
CC
Back
3
4
X1
X2
10M
V
SS
220K
43pF
X1243
8 pin TSSOP
V
SCL
SDA
SS
IRQ
Back
1
2
8
7
6
5
V
CC
Figure 1. Recommended Crystal connection
POWER CONTROL OPERATION
V
X1
X2
3
4
The Power control circuit accepts a V
and a V
CC
BACK
input. The power control circuit will switch to V
PIN DESCRIPTIONS
Serial Clock (SCL)
BACK
when V < V
- 0.2V. It will switch back to V
CC
CC
BACK
when V exceeds V
.
CC
BACK
The SCL input is used to clock all data into and out of
the device. The input buffer on this pin is always active
(not gated).
V
CC
Internal
Voltage
V
BACK
Serial Data (SDA)
V
= V -0.2V
BACK
CC
SDA is a bidirectional pin used to transfer data into
and out of the device. It has an open drain output and
may be wire ORed with other open drain or open col-
lector outputs. The input buffer is always active (not
gated).
Figure 2. Power Control
REAL TIME CLOCK OPERATION
An open drain output requires the use of a pull-up
resistor. The output circuitry controls the fall time of
the output signal with the use of a slope controlled
pull-down. The circuit is designed for 400kHz 2-wire
interface speeds.
The Real Time Clock (RTC) uses an external, 32.768KHz
quartz crystal to maintain an accurate internal repre-
sentation of the year, month, day, date, hour, minute,
and seconds. The RTC has leap-year correction and a
century byte. The clock will also correct for months hav-
ing fewer than 31 days and will have a bit that controls
24 hour or AM/PM format. When the X1243 powers up
V
BACK
This input provides a backup supply voltage to the
device. V supplies power to the device in the
BACK
after the loss of both V and V
, the clock will not
CC
BACK
event the V supply fails.
CC
increment until at least one byte is written to the clock
register.
Interrupt Output— IRQ
Reading the Real Time Clock
This is an interrupt signal output. This signal notifies a
host processor that alarm has occurred and requests
action. It is an open drain active LOW output.
The RTC is read by initiating a Read command and
specifying the address corresponding to the register of
the Real Time Clock. The RTC Registers can then be
read in a Sequential Read Mode. Since the clock runs
continuously and a read takes a finite amount of time,
there is the possibility that the clock could change dur-
ing the course of a read operation. In this device, the
time is latched by the read command (falling edge of
X1, X2
The X1 and X2 pins are the input and output, respec-
tively, of an inverting amplifier that can be configured
for use as an on-chip oscillator. A 32.768kHz quartz
crystal is used. Recommeded crystals are Sieko VT-200
2
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